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authorAndre Przywara <andre.przywara@arm.com>2015-12-01 14:33:41 +0000
committerChristoffer Dall <christoffer.dall@linaro.org>2016-05-20 15:39:52 +0200
commit96b298000db48360e49a1f8f9edc6d2b9c1b2548 (patch)
treeda31c7195b7cea7d92b5570eaf7ec39f55bb12af /virt/kvm/arm/vgic/vgic-mmio.h
parentfd122e620983003c376aca56892ac14a34a38d57 (diff)
downloadlinux-stericsson-96b298000db48360e49a1f8f9edc6d2b9c1b2548.tar.gz
KVM: arm/arm64: vgic-new: Add PENDING registers handlers
The pending register handlers are shared between the v2 and v3 emulation, so their implementation goes into vgic-mmio.c, to be easily referenced from the v3 emulation as well later. For level triggered interrupts the real line level is unaffected by this write, so we keep this state separate and combine it with the device's level to get the actual pending state. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Diffstat (limited to 'virt/kvm/arm/vgic/vgic-mmio.h')
-rw-r--r--virt/kvm/arm/vgic/vgic-mmio.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/virt/kvm/arm/vgic/vgic-mmio.h b/virt/kvm/arm/vgic/vgic-mmio.h
index 57e19fe8df55..97ee703a1bd6 100644
--- a/virt/kvm/arm/vgic/vgic-mmio.h
+++ b/virt/kvm/arm/vgic/vgic-mmio.h
@@ -107,6 +107,18 @@ void vgic_mmio_write_cenable(struct kvm_vcpu *vcpu,
gpa_t addr, unsigned int len,
unsigned long val);
+unsigned long vgic_mmio_read_pending(struct kvm_vcpu *vcpu,
+ gpa_t addr, unsigned int len);
+
+void vgic_mmio_write_spending(struct kvm_vcpu *vcpu,
+ gpa_t addr, unsigned int len,
+ unsigned long val);
+
+void vgic_mmio_write_cpending(struct kvm_vcpu *vcpu,
+ gpa_t addr, unsigned int len,
+ unsigned long val);
+
+
unsigned int vgic_v2_init_dist_iodev(struct vgic_io_device *dev);
#endif