path: root/drivers/clk/x86
diff options
authorMika Westerberg <mika.westerberg@linux.intel.com>2013-05-13 12:42:44 +0000
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2013-06-19 01:08:47 +0200
commitf627217064dbef1eef53ceb01edb9c94203991e0 (patch)
tree8a8f1caba1b430fe2c7506f32f10a9a3188e27a4 /drivers/clk/x86
parent7d132055814ef17a6c7b69f342244c410a5e000f (diff)
ACPI / LPSS: add support for Intel BayTrail
Intel BayTrail has almost the same Low Power Subsystem than Lynxpoint with few differences. Peripherals are clocked with different speeds (typically lower) and the clock is not always gated. To support this we add possibility to share a common fixed rate clock and make clock gating optional. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'drivers/clk/x86')
1 files changed, 1 insertions, 3 deletions
diff --git a/drivers/clk/x86/clk-lpt.c b/drivers/clk/x86/clk-lpt.c
index 4f45eee9e33b..812f83f8b0c6 100644
--- a/drivers/clk/x86/clk-lpt.c
+++ b/drivers/clk/x86/clk-lpt.c
@@ -1,5 +1,5 @@
- * Intel Lynxpoint LPSS clocks.
+ * Intel Low Power Subsystem clocks.
* Copyright (C) 2013, Intel Corporation
* Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
@@ -18,8 +18,6 @@
#include <linux/platform_data/clk-lpss.h>
#include <linux/platform_device.h>
-#define PRV_CLOCK_PARAMS 0x800
static int lpt_clk_probe(struct platform_device *pdev)
struct lpss_clk_data *drvdata;