aboutsummaryrefslogtreecommitdiff
path: root/arch
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2016-09-24 12:44:28 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2016-09-24 12:44:28 -0700
commit9c0e28a7be656d737fb18998e2dcb0b8ce595643 (patch)
tree10f54f40da96c519ba2d781cae9398dfc73a3a2c /arch
parent2507c856620cc7474e6101b0a05f82ac0ae5bf69 (diff)
parent3bf6215a1b30db7df6083c708caab3fe1a8e8abe (diff)
downloadlinux-stericsson-9c0e28a7be656d737fb18998e2dcb0b8ce595643.tar.gz
Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull perf fixes from Thomas Gleixner: "Three fixlets for perf: - add a missing NULL pointer check in the intel BTS driver - make BTS an exclusive PMU because BTS can only handle one event at a time - ensure that exclusive events are limited to one PMU so that several exclusive events can be scheduled on different PMU instances" * 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: perf/core: Limit matching exclusive events to one PMU perf/x86/intel/bts: Make it an exclusive PMU perf/x86/intel/bts: Make sure debug store is valid
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/events/intel/bts.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/x86/events/intel/bts.c b/arch/x86/events/intel/bts.c
index bdcd6510992c..982c9e31daca 100644
--- a/arch/x86/events/intel/bts.c
+++ b/arch/x86/events/intel/bts.c
@@ -455,7 +455,7 @@ int intel_bts_interrupt(void)
* The only surefire way of knowing if this NMI is ours is by checking
* the write ptr against the PMI threshold.
*/
- if (ds->bts_index >= ds->bts_interrupt_threshold)
+ if (ds && (ds->bts_index >= ds->bts_interrupt_threshold))
handled = 1;
/*
@@ -584,7 +584,8 @@ static __init int bts_init(void)
if (!boot_cpu_has(X86_FEATURE_DTES64) || !x86_pmu.bts)
return -ENODEV;
- bts_pmu.capabilities = PERF_PMU_CAP_AUX_NO_SG | PERF_PMU_CAP_ITRACE;
+ bts_pmu.capabilities = PERF_PMU_CAP_AUX_NO_SG | PERF_PMU_CAP_ITRACE |
+ PERF_PMU_CAP_EXCLUSIVE;
bts_pmu.task_ctx_nr = perf_sw_context;
bts_pmu.event_init = bts_event_init;
bts_pmu.add = bts_event_add;