path: root/arch/tile/kernel/intvec_32.S
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authorChris Metcalf <cmetcalf@tilera.com>2010-10-14 14:42:58 -0400
committerChris Metcalf <cmetcalf@tilera.com>2010-10-14 14:42:58 -0400
commitd6f0f22c3c409f9ed88e64f881f8308730be76f0 (patch)
tree5521d78679fd3441cecdfe5a273eeca81aee922f /arch/tile/kernel/intvec_32.S
parent5592840ba83c281b4df45345863b224bb290020c (diff)
arch/tile: update some comments to clarify register usage.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Diffstat (limited to 'arch/tile/kernel/intvec_32.S')
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/tile/kernel/intvec_32.S b/arch/tile/kernel/intvec_32.S
index 7c7e9ac2580d..c62c2f421ef3 100644
--- a/arch/tile/kernel/intvec_32.S
+++ b/arch/tile/kernel/intvec_32.S
@@ -1553,6 +1553,8 @@ STD_ENTRY(_sys_clone)
* to be available to it on entry. It does not modify any callee-save
* registers (including "lr"). It does not check what PL it is being
* called at, so you'd better not call it other than at PL0.
+ * The <atomic.h> wrapper assumes it only clobbers r20-r29, so if
+ * it ever is necessary to use more registers, be aware.
* It does not use the stack, but since it might be re-interrupted by
* a page fault which would assume the stack was valid, it does