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authorRussell King <rmk+kernel@arm.linux.org.uk>2014-05-27 20:34:28 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2014-06-02 09:23:54 +0100
commitca8f0b0a545f55b3dc6877cda24d609a8979c951 (patch)
tree6f6800bbf78f1b81a1d6bb73d84f380e08113c17 /arch/arm/include/asm/mcpm.h
parent8229c54fa1747765dae1a77875b04e4d69f6ab62 (diff)
downloadlinux-stericsson-ca8f0b0a545f55b3dc6877cda24d609a8979c951.tar.gz
ARM: ensure C page table setup code follows assembly code
Fix a long standing bug where, for ARMv6+, we don't fully ensure that the C code sets the same cache policy as the assembly code. This was introduced partially by commit 11179d8ca28d ([ARM] 4497/1: Only allow safe cache configurations on ARMv6 and later) and also by adding SMP support. This patch sets the default cache policy based on the flags used by the assembly code, and then ensures that when a cache policy command line argument is used, we verify that on ARMv6, it matches the initial setup. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/include/asm/mcpm.h')
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