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authorDave Airlie <airlied@redhat.com>2011-08-30 20:22:04 +0100
committerDave Airlie <airlied@redhat.com>2011-08-31 14:06:19 +0100
commit9adceaa5b3d2480e2252c4a7f9c4bd7d66b8c4a2 (patch)
tree169b5c6c8d6cbc26b569af3ec945fae046d15d21
parent9e79e3e9dd9672b37ac9412e9a926714306551fe (diff)
downloadlinux-stericsson-9adceaa5b3d2480e2252c4a7f9c4bd7d66b8c4a2.tar.gz
drm/radeon/kms: set a default max_pixel_clock
On some Power rv100 cards, we have no ATY OF table, but we have no combios table either, and hence we refuse all modes on VGA-0 since we end up with a 0 max pixel clock. Signed-off-by: Dave Airlie <airlied@redhat.com> Cc: stable@kernel.org Reviewed-by: Alex Deucher <alexdeucher@gmail.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
-rw-r--r--drivers/gpu/drm/radeon/radeon_clocks.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_clocks.c b/drivers/gpu/drm/radeon/radeon_clocks.c
index dcd0863e31ae..b6e18c8db9f5 100644
--- a/drivers/gpu/drm/radeon/radeon_clocks.c
+++ b/drivers/gpu/drm/radeon/radeon_clocks.c
@@ -219,6 +219,9 @@ void radeon_get_clock_info(struct drm_device *dev)
} else {
DRM_INFO("Using generic clock info\n");
+ /* may need to be per card */
+ rdev->clock.max_pixel_clock = 35000;
+
if (rdev->flags & RADEON_IS_IGP) {
p1pll->reference_freq = 1432;
p2pll->reference_freq = 1432;