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authorFlorian Fainelli <florian@openwrt.org>2009-08-31 20:27:39 +0200
committerRalf Baechle <ralf@linux-mips.org>2009-11-02 12:00:03 +0100
commite85d59df13cf5cce08becb3fd261048e6d870c0d (patch)
tree2ba33e2a51774f0684ba54d41cac066693f67041
parenta2e62f3a852e1e8187853291f5ee09ad4c881fcc (diff)
downloadlinux-stericsson-e85d59df13cf5cce08becb3fd261048e6d870c0d.tar.gz
MIPS: BCM63xx: Fix soft-reset lockup on BCM6345
This patch fixes a lockup on BCM6345 where setting the PLL soft reset bit will also lock the other blocks including UART. Instead of setting only the PLL soft reset bit in the software reset register, set this bit but do not touch the others. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/bcm63xx/setup.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/mips/bcm63xx/setup.c b/arch/mips/bcm63xx/setup.c
index b18a0ca926fa..d0056598fbfc 100644
--- a/arch/mips/bcm63xx/setup.c
+++ b/arch/mips/bcm63xx/setup.c
@@ -75,7 +75,9 @@ void bcm63xx_machine_reboot(void)
bcm6348_a1_reboot();
printk(KERN_INFO "triggering watchdog soft-reset...\n");
- bcm_perf_writel(SYS_PLL_SOFT_RESET, PERF_SYS_PLL_CTL_REG);
+ reg = bcm_perf_readl(PERF_SYS_PLL_CTL_REG);
+ reg |= SYS_PLL_SOFT_RESET;
+ bcm_perf_writel(reg, PERF_SYS_PLL_CTL_REG);
while (1)
;
}