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authorChris Dearman <chris@mips.com>2007-06-21 12:59:57 +0100
committerRalf Baechle <ralf@linux-mips.org>2007-07-06 16:17:11 +0100
commitc3e838a2cbb0f14af4d718160933523ac4c37adf (patch)
tree37f41332212861826d18aff9c373846d31a93174
parent6fb88ce04f545ca7da15a7b447783bb7a4615511 (diff)
downloadlinux-stericsson-c3e838a2cbb0f14af4d718160933523ac4c37adf.tar.gz
[MIPS] Fix timer/performance interrupt detection
Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/kernel/traps.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index b1233644fcca..3ea7863c4519 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1372,12 +1372,12 @@ void __init per_cpu_trap_init(void)
*/
if (cpu_has_mips_r2) {
cp0_compare_irq = (read_c0_intctl () >> 29) & 7;
- cp0_perfcount_irq = -1;
- } else {
- cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ;
cp0_perfcount_irq = (read_c0_intctl () >> 26) & 7;
- if (cp0_perfcount_irq != cp0_compare_irq)
+ if (cp0_perfcount_irq == cp0_compare_irq)
cp0_perfcount_irq = -1;
+ } else {
+ cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ;
+ cp0_perfcount_irq = -1;
}
#ifdef CONFIG_MIPS_MT_SMTC