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authorLinus Walleij <linus.walleij@linaro.org>2014-07-10 10:42:05 +0200
committerLinus Walleij <linus.walleij@linaro.org>2014-07-10 10:46:42 +0200
commit823e7546c4a2bd4c8edce6d8dc8544fd79287c55 (patch)
tree45fd0c86296f399db3b233c4a3f987778b8ebff8
parent922468cdf1a704c0c13e023d634ff802edc37910 (diff)
downloadlinux-stericsson-823e7546c4a2bd4c8edce6d8dc8544fd79287c55.tar.gz
ARM: ux500: remove pointless cache setup complexityux500-core-for-v3.17-1
This cleans out non-DT cache setup (the ux500 is DT only), and sinks the l2cc base into the unlock function. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r--arch/arm/mach-ux500/cache-l2x0.c18
1 files changed, 4 insertions, 14 deletions
diff --git a/arch/arm/mach-ux500/cache-l2x0.c b/arch/arm/mach-ux500/cache-l2x0.c
index 842ebedbdd1c..e97ee556f92f 100644
--- a/arch/arm/mach-ux500/cache-l2x0.c
+++ b/arch/arm/mach-ux500/cache-l2x0.c
@@ -7,17 +7,15 @@
#include <linux/io.h>
#include <linux/of.h>
-#include <asm/cacheflush.h>
#include <asm/hardware/cache-l2x0.h>
#include "db8500-regs.h"
#include "id.h"
-static void __iomem *l2x0_base;
-
static int __init ux500_l2x0_unlock(void)
{
int i;
+ void __iomem *l2x0_base = __io_address(U8500_L2CC_BASE);
/*
* Unlock Data and Instruction Lock if locked. Ux500 U-Boot versions
@@ -45,23 +43,15 @@ static void ux500_l2c310_write_sec(unsigned long val, unsigned reg)
static int __init ux500_l2x0_init(void)
{
- if (cpu_is_u8500_family() || cpu_is_ux540_family())
- l2x0_base = __io_address(U8500_L2CC_BASE);
- else
- /* Non-Ux500 platform */
+ /* Multiplatform guard */
+ if (!((cpu_is_u8500_family() || cpu_is_ux540_family())))
return -ENODEV;
/* Unlock before init */
ux500_l2x0_unlock();
-
outer_cache.write_sec = ux500_l2c310_write_sec;
-
- if (of_have_populated_dt())
- l2x0_of_init(0, ~0);
- else
- l2x0_init(l2x0_base, 0, ~0);
+ l2x0_of_init(0, ~0);
return 0;
}
-
early_initcall(ux500_l2x0_init);