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authorMark Brown <broonie@opensource.wolfsonmicro.com>2012-12-10 00:22:00 +0900
committerMark Brown <broonie@opensource.wolfsonmicro.com>2012-12-10 00:22:00 +0900
commitdaa5ab9e0d20ab5c07a5f016fa0577ad66da546e (patch)
treecaa30d8d412514b719ee2f017064b694c5288d82 /sound/soc/codecs/wm_adsp.c
parentc006062652cb23d8879db09e76a9c5d9b060f920 (diff)
parenta1abfa86d01c68d4d05d312998f00513c0c0d834 (diff)
downloadvexpress-lsk-daa5ab9e0d20ab5c07a5f016fa0577ad66da546e.tar.gz
Merge remote-tracking branch 'asoc/topic/arizona' into asoc-next
Diffstat (limited to 'sound/soc/codecs/wm_adsp.c')
-rw-r--r--sound/soc/codecs/wm_adsp.c33
1 files changed, 33 insertions, 0 deletions
diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c
index 7fdb68ef384..ffc89fab96f 100644
--- a/sound/soc/codecs/wm_adsp.c
+++ b/sound/soc/codecs/wm_adsp.c
@@ -544,6 +544,28 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w,
switch (event) {
case SND_SOC_DAPM_POST_PMU:
+ /*
+ * For simplicity set the DSP clock rate to be the
+ * SYSCLK rate rather than making it configurable.
+ */
+ ret = regmap_read(dsp->regmap, ARIZONA_SYSTEM_CLOCK_1, &val);
+ if (ret != 0) {
+ adsp_err(dsp, "Failed to read SYSCLK state: %d\n",
+ ret);
+ return ret;
+ }
+ val = (val & ARIZONA_SYSCLK_FREQ_MASK)
+ >> ARIZONA_SYSCLK_FREQ_SHIFT;
+
+ ret = regmap_update_bits(dsp->regmap,
+ dsp->base + ADSP2_CLOCKING,
+ ADSP2_CLK_SEL_MASK, val);
+ if (ret != 0) {
+ adsp_err(dsp, "Failed to set clock rate: %d\n",
+ ret);
+ return ret;
+ }
+
if (dsp->dvfs) {
ret = regmap_read(dsp->regmap,
dsp->base + ADSP2_CLOCKING, &val);
@@ -631,6 +653,17 @@ int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs)
{
int ret;
+ /*
+ * Disable the DSP memory by default when in reset for a small
+ * power saving.
+ */
+ ret = regmap_update_bits(adsp->regmap, adsp->base + ADSP2_CONTROL,
+ ADSP2_MEM_ENA, 0);
+ if (ret != 0) {
+ adsp_err(adsp, "Failed to clear memory retention: %d\n", ret);
+ return ret;
+ }
+
if (dvfs) {
adsp->dvfs = devm_regulator_get(adsp->dev, "DCVDD");
if (IS_ERR(adsp->dvfs)) {