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authorNicolas Pitre <nicolas.pitre@linaro.org>2012-07-05 21:33:26 -0400
committerNicolas Pitre <nicolas.pitre@linaro.org>2013-06-19 16:54:22 -0400
commiteb3525e4e0279291d89546a1d8c240079943b8b2 (patch)
tree99733c8df192a6133bcbfa2932196e379902018d /include/linux/irqchip/arm-gic.h
parent0ed7390292d925cfef71d29134451370c36b4112 (diff)
downloadvexpress-lsk-eb3525e4e0279291d89546a1d8c240079943b8b2.tar.gz
ARM: bL_switcher: do not hardcode GIC IDs in the code
Currently, GIC IDs are hardcoded making the code dependent on the x4 b.L configuration. Let's allow for GIC IDs to be discovered upon switcher initialization to support other b.L configurations such as the x1 one. Signed-off-by: Nicolas Pitre <nico@linaro.org>
Diffstat (limited to 'include/linux/irqchip/arm-gic.h')
-rw-r--r--include/linux/irqchip/arm-gic.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h
index 40bfcac9594..2d7d47e8dfa 100644
--- a/include/linux/irqchip/arm-gic.h
+++ b/include/linux/irqchip/arm-gic.h
@@ -75,6 +75,7 @@ static inline void gic_init(unsigned int nr, int start,
gic_init_bases(nr, start, dist, cpu, 0, NULL);
}
+int gic_get_cpu_id(unsigned int cpu);
void gic_migrate_target(unsigned int new_cpu_id);
#endif /* __ASSEMBLY */