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authorStephen Warren <swarren@nvidia.com>2013-02-13 12:50:48 -0700
committerStephen Warren <swarren@nvidia.com>2013-04-05 12:23:24 -0600
commit4be505d4fc7a07371a2b658469ca1dda99993ca3 (patch)
tree5b36c2ded37a8ee78e32dd4ec43627eadd3586a8 /include/dt-bindings
parent840ef8b7cc584a23c4f9d05352f4dbaf8e56e5ab (diff)
downloadvexpress-lsk-4be505d4fc7a07371a2b658469ca1dda99993ca3.tar.gz
ARM: dt: create a DT header for the GIC
The ARM GIC binding defines a few custom cells and flags for its IRQ specifier. Provide names for those. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Rob Herring <rob.herring@calxeda.com>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/interrupt-controller/arm-gic.h22
1 files changed, 22 insertions, 0 deletions
diff --git a/include/dt-bindings/interrupt-controller/arm-gic.h b/include/dt-bindings/interrupt-controller/arm-gic.h
new file mode 100644
index 00000000000..1ea1b702fec
--- /dev/null
+++ b/include/dt-bindings/interrupt-controller/arm-gic.h
@@ -0,0 +1,22 @@
+/*
+ * This header provides constants for the ARM GIC.
+ */
+
+#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
+#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
+
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/* interrupt specific cell 0 */
+
+#define GIC_SPI 0
+#define GIC_PPI 1
+
+/*
+ * Interrupt specifier cell 2.
+ * The flaggs in irq.h are valid, plus those below.
+ */
+#define GIC_CPU_MASK_RAW(x) ((x) << 8)
+#define GIC_CPU_MASK_SIMPLE(num) GIC_CPU_MASK_RAW((1 << (num)) - 1)
+
+#endif