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authorAxel Lin <axel.lin@ingics.com>2013-04-23 14:02:49 +0800
committerThierry Reding <thierry.reding@avionic-design.de>2013-04-23 10:58:47 +0200
commitaffb923df96d6c927f9a3dfb0e6f4be940b185cd (patch)
tree3f1c654c95946c04e465ab230fa5e61c30bb9dd8 /drivers/pwm
parent08ee77b5a5de27ad63c92262ebcb4efe0da93b58 (diff)
downloadvexpress-lsk-affb923df96d6c927f9a3dfb0e6f4be940b185cd.tar.gz
pwm: lpc32xx: Don't change PWM_ENABLE bit in lpc32xx_pwm_config
lpc32xx_pwm_config() is supposed to set duty_ns and period_ns, it should not change PWM_ENABLE bit. Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested-by: Roland Stigge <stigge@antcom.de> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Diffstat (limited to 'drivers/pwm')
-rw-r--r--drivers/pwm/pwm-lpc32xx.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/pwm/pwm-lpc32xx.c b/drivers/pwm/pwm-lpc32xx.c
index 6b6272f61da..8272883c0d0 100644
--- a/drivers/pwm/pwm-lpc32xx.c
+++ b/drivers/pwm/pwm-lpc32xx.c
@@ -37,6 +37,7 @@ static int lpc32xx_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
struct lpc32xx_pwm_chip *lpc32xx = to_lpc32xx_pwm_chip(chip);
unsigned long long c;
int period_cycles, duty_cycles;
+ u32 val;
c = clk_get_rate(lpc32xx->clk) / 256;
c = c * period_ns;
@@ -68,8 +69,10 @@ static int lpc32xx_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
c = 255;
duty_cycles = 256 - c;
- writel(PWM_ENABLE | PWM_RELOADV(period_cycles) | PWM_DUTY(duty_cycles),
- lpc32xx->base + (pwm->hwpwm << 2));
+ val = readl(lpc32xx->base + (pwm->hwpwm << 2));
+ val &= ~0xFFFF;
+ val |= PWM_RELOADV(period_cycles) | PWM_DUTY(duty_cycles);
+ writel(val, lpc32xx->base + (pwm->hwpwm << 2));
return 0;
}