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authorSteven A. Falco <sfalco@harris.com>2013-04-22 09:34:39 +0000
committerWolfram Sang <wsa@the-dreams.de>2013-04-23 20:18:34 +0200
commitc39e8e4354ce4daf23336de5daa28a3b01f00aa6 (patch)
tree41ebb9ee4bd1323269c8a8c8849e361ef4910375 /drivers/i2c/busses
parent73f37dc3aa566f2533e6fda83a7c0a83657bada5 (diff)
downloadvexpress-lsk-c39e8e4354ce4daf23336de5daa28a3b01f00aa6.tar.gz
i2c: xiic: must always write 16-bit words to TX_FIFO
The TX_FIFO register is 10 bits wide. The lower 8 bits are the data to be written, while the upper two bits are flags to indicate stop/start. The driver apparently attempted to optimize write access, by only writing a byte in those cases where the stop/start bits are zero. However, we have seen cases where the lower byte is duplicated onto the upper byte by the hardware, which causes inadvertent stop/starts. This patch changes the write access to the transmit FIFO to always be 16 bits wide. Signed off by: Steven A. Falco <sfalco@harris.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
Diffstat (limited to 'drivers/i2c/busses')
-rw-r--r--drivers/i2c/busses/i2c-xiic.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/i2c/busses/i2c-xiic.c b/drivers/i2c/busses/i2c-xiic.c
index 332c720fb3f..3d0f0520c1b 100644
--- a/drivers/i2c/busses/i2c-xiic.c
+++ b/drivers/i2c/busses/i2c-xiic.c
@@ -312,10 +312,8 @@ static void xiic_fill_tx_fifo(struct xiic_i2c *i2c)
/* last message in transfer -> STOP */
data |= XIIC_TX_DYN_STOP_MASK;
dev_dbg(i2c->adap.dev.parent, "%s TX STOP\n", __func__);
-
- xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, data);
- } else
- xiic_setreg8(i2c, XIIC_DTR_REG_OFFSET, data);
+ }
+ xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, data);
}
}