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authorAlex Deucher <alexander.deucher@amd.com>2013-06-07 10:04:54 -0400
committerAlex Deucher <alexander.deucher@amd.com>2013-06-14 17:05:57 -0400
commitc139b1ee4e36374af705660af6172d7477352792 (patch)
treedb7a1cd3446e15b33e6912423a2f346ca11d946d /drivers/gpu
parent089920f21db0108fb105ecfd81de4c92d88f06d0 (diff)
downloadvexpress-lsk-c139b1ee4e36374af705660af6172d7477352792.tar.gz
drm/radeon: fix UVD on big endian
This fixes the kernel side so that the ring should come up and ring and IB tests should work. The userspace UVD drivers will also need big endian fixes. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/radeon/r600.c13
-rw-r--r--drivers/gpu/drm/radeon/radeon_uvd.c34
2 files changed, 27 insertions, 20 deletions
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 0e534169592..6948eb88c2b 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -2687,6 +2687,9 @@ void r600_uvd_rbc_stop(struct radeon_device *rdev)
int r600_uvd_init(struct radeon_device *rdev)
{
int i, j, r;
+ /* disable byte swapping */
+ u32 lmi_swap_cntl = 0;
+ u32 mp_swap_cntl = 0;
/* raise clocks while booting up the VCPU */
radeon_set_uvd_clocks(rdev, 53300, 40000);
@@ -2711,9 +2714,13 @@ int r600_uvd_init(struct radeon_device *rdev)
WREG32(UVD_LMI_CTRL, 0x40 | (1 << 8) | (1 << 13) |
(1 << 21) | (1 << 9) | (1 << 20));
- /* disable byte swapping */
- WREG32(UVD_LMI_SWAP_CNTL, 0);
- WREG32(UVD_MP_SWAP_CNTL, 0);
+#ifdef __BIG_ENDIAN
+ /* swap (8 in 32) RB and IB */
+ lmi_swap_cntl = 0xa;
+ mp_swap_cntl = 0;
+#endif
+ WREG32(UVD_LMI_SWAP_CNTL, lmi_swap_cntl);
+ WREG32(UVD_MP_SWAP_CNTL, mp_swap_cntl);
WREG32(UVD_MPC_SET_MUXA0, 0x40c2040);
WREG32(UVD_MPC_SET_MUXA1, 0x0);
diff --git a/drivers/gpu/drm/radeon/radeon_uvd.c b/drivers/gpu/drm/radeon/radeon_uvd.c
index 9f55adefa8e..cad735dd02c 100644
--- a/drivers/gpu/drm/radeon/radeon_uvd.c
+++ b/drivers/gpu/drm/radeon/radeon_uvd.c
@@ -627,19 +627,19 @@ int radeon_uvd_get_create_msg(struct radeon_device *rdev, int ring,
}
/* stitch together an UVD create msg */
- msg[0] = 0x00000de4;
- msg[1] = 0x00000000;
- msg[2] = handle;
- msg[3] = 0x00000000;
- msg[4] = 0x00000000;
- msg[5] = 0x00000000;
- msg[6] = 0x00000000;
- msg[7] = 0x00000780;
- msg[8] = 0x00000440;
- msg[9] = 0x00000000;
- msg[10] = 0x01b37000;
+ msg[0] = cpu_to_le32(0x00000de4);
+ msg[1] = cpu_to_le32(0x00000000);
+ msg[2] = cpu_to_le32(handle);
+ msg[3] = cpu_to_le32(0x00000000);
+ msg[4] = cpu_to_le32(0x00000000);
+ msg[5] = cpu_to_le32(0x00000000);
+ msg[6] = cpu_to_le32(0x00000000);
+ msg[7] = cpu_to_le32(0x00000780);
+ msg[8] = cpu_to_le32(0x00000440);
+ msg[9] = cpu_to_le32(0x00000000);
+ msg[10] = cpu_to_le32(0x01b37000);
for (i = 11; i < 1024; ++i)
- msg[i] = 0x0;
+ msg[i] = cpu_to_le32(0x0);
radeon_bo_kunmap(bo);
radeon_bo_unreserve(bo);
@@ -673,12 +673,12 @@ int radeon_uvd_get_destroy_msg(struct radeon_device *rdev, int ring,
}
/* stitch together an UVD destroy msg */
- msg[0] = 0x00000de4;
- msg[1] = 0x00000002;
- msg[2] = handle;
- msg[3] = 0x00000000;
+ msg[0] = cpu_to_le32(0x00000de4);
+ msg[1] = cpu_to_le32(0x00000002);
+ msg[2] = cpu_to_le32(handle);
+ msg[3] = cpu_to_le32(0x00000000);
for (i = 4; i < 1024; ++i)
- msg[i] = 0x0;
+ msg[i] = cpu_to_le32(0x0);
radeon_bo_kunmap(bo);
radeon_bo_unreserve(bo);