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authorShawn Guo <shawn.guo@linaro.org>2012-08-12 22:22:33 +0800
committerShawn Guo <shawn.guo@linaro.org>2012-09-11 16:26:52 +0800
commit072480426ba9b5a0d68d91006fdb07fd568ef6ad (patch)
treee345f36a4ec4584fc982133af8c42928f725dfce /arch/arm/boot/dts/imx53.dtsi
parent327a79c01e45e269da33af1500cd7da8a24c3ba4 (diff)
downloadvexpress-lsk-072480426ba9b5a0d68d91006fdb07fd568ef6ad.tar.gz
ARM: dts: imx53-smd: add pinctrl settings
Add pinctrl settings for the exsiting devices in imx53-smd.dts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx53.dtsi')
-rw-r--r--arch/arm/boot/dts/imx53.dtsi33
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index c08bec5a840..221cf3321b0 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -286,6 +286,19 @@
};
};
+ esdhc2 {
+ pinctrl_esdhc2_1: esdhc2grp-1 {
+ fsl,pins = <
+ 1038 0x1d5 /* MX53_PAD_SD2_CMD__ESDHC2_CMD */
+ 1032 0x1d5 /* MX53_PAD_SD2_CLK__ESDHC2_CLK */
+ 1062 0x1d5 /* MX53_PAD_SD2_DATA0__ESDHC2_DAT0 */
+ 1056 0x1d5 /* MX53_PAD_SD2_DATA1__ESDHC2_DAT1 */
+ 1050 0x1d5 /* MX53_PAD_SD2_DATA2__ESDHC2_DAT2 */
+ 1044 0x1d5 /* MX53_PAD_SD2_DATA3__ESDHC2_DAT3 */
+ >;
+ };
+ };
+
esdhc3 {
pinctrl_esdhc3_1: esdhc3grp-1 {
fsl,pins = <
@@ -336,6 +349,26 @@
>;
};
};
+
+ uart2 {
+ pinctrl_uart2_1: uart2grp-1 {
+ fsl,pins = <
+ 841 0x1c5 /* MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX */
+ 836 0x1c5 /* MX53_PAD_PATA_DMARQ__UART2_TXD_MUX */
+ >;
+ };
+ };
+
+ uart3 {
+ pinctrl_uart3_1: uart3grp-1 {
+ fsl,pins = <
+ 884 0x1c5 /* MX53_PAD_PATA_CS_0__UART3_TXD_MUX */
+ 888 0x1c5 /* MX53_PAD_PATA_CS_1__UART3_RXD_MUX */
+ 875 0x1c5 /* MX53_PAD_PATA_DA_1__UART3_CTS */
+ 880 0x1c5 /* MX53_PAD_PATA_DA_2__UART3_RTS */
+ >;
+ };
+ };
};
uart1: serial@53fbc000 {