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authorAmit Daniel Kachhap <amit.kachhap@linaro.org>2012-01-10 10:49:19 +0530
committerAndrey Konovalov <andrey.konovalov@linaro.org>2012-02-15 16:38:32 +0400
commite08e698f7a0978a74796cdd3b2b40ff6b702d24e (patch)
tree44196291182c0857c79c46d1a4f764effc0532f3
parentf57f8d0fa083909f418310173f3130f5efbac9c0 (diff)
downloadvexpress-lsk-e08e698f7a0978a74796cdd3b2b40ff6b702d24e.tar.gz
ARM: exynos: Enable l2 configuration through device tree
This patch enables calling generic l2 setup functions if device tree is used. Signed-off-by: Amit Daniel Kachhap <amit.kachhap@linaro.org>
-rw-r--r--arch/arm/mach-exynos/common.c14
1 files changed, 13 insertions, 1 deletions
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 15ba9b115a6..53ceaedacc2 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -48,6 +48,9 @@
#include "common.h"
+#define L2_AUX_VAL 0x7C470001
+#define L2_AUX_MASK 0xC200ffff
+
static const char name_exynos4210[] = "EXYNOS4210";
static const char name_exynos4212[] = "EXYNOS4212";
static const char name_exynos4412[] = "EXYNOS4412";
@@ -443,6 +446,15 @@ core_initcall(exynos4_core_init);
#ifdef CONFIG_CACHE_L2X0
static int __init exynos4_l2x0_cache_init(void)
{
+#ifdef CONFIG_OF
+ int ret;
+ ret = l2x0_of_init(L2_AUX_VAL, L2_AUX_MASK);
+ if (!ret) {
+ l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs);
+ clean_dcache_area(&l2x0_regs_phys, sizeof(unsigned long));
+ return 0;
+ }
+#endif
if (!(__raw_readl(S5P_VA_L2CC + L2X0_CTRL) & 0x1)) {
l2x0_saved_regs.phy_base = EXYNOS4_PA_L2CC;
/* TAG, Data Latency Control: 2 cycles */
@@ -476,7 +488,7 @@ static int __init exynos4_l2x0_cache_init(void)
clean_dcache_area(&l2x0_saved_regs, sizeof(struct l2x0_regs));
}
- l2x0_init(S5P_VA_L2CC, 0x7C470001, 0xC200ffff);
+ l2x0_init(S5P_VA_L2CC, L2_AUX_VAL, L2_AUX_MASK);
return 0;
}