path: root/arch/powerpc/include/asm/perf_event_server.h
diff options
authorJoel Stanley <joel@jms.id.au>2014-07-08 16:08:21 +0930
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2014-07-11 12:55:07 +1000
commit4d9690dd56b0d18f2af8a9d4a279cb205aae3345 (patch)
treeba7cea5414444ccf79b27d3c1975bdbe18f14c27 /arch/powerpc/include/asm/perf_event_server.h
parentf73128f4f680e8be68cda831f2710214559583cb (diff)
powerpc/perf: Add PPMU_ARCH_207S define
Instead of separate bits for every POWER8 PMU feature, have a single one for v2.07 of the architecture. This saves us adding a MMCR2 define for a future patch. Cc: stable@vger.kernel.org Signed-off-by: Joel Stanley <joel@jms.id.au> Acked-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include/asm/perf_event_server.h')
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/powerpc/include/asm/perf_event_server.h b/arch/powerpc/include/asm/perf_event_server.h
index 9ed737146db..b3e936027b2 100644
--- a/arch/powerpc/include/asm/perf_event_server.h
+++ b/arch/powerpc/include/asm/perf_event_server.h
@@ -61,8 +61,7 @@ struct power_pmu {
#define PPMU_SIAR_VALID 0x00000010 /* Processor has SIAR Valid bit */
#define PPMU_HAS_SSLOT 0x00000020 /* Has sampled slot in MMCRA */
#define PPMU_HAS_SIER 0x00000040 /* Has SIER */
-#define PPMU_BHRB 0x00000080 /* has BHRB feature enabled */
-#define PPMU_EBB 0x00000100 /* supports event based branch */
+#define PPMU_ARCH_207S 0x00000080 /* PMC is architecture v2.07S */
* Values for flags to get_alternatives()