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authorAlexander Varnin <fenixk19@mail.ru>2012-11-20 20:02:58 +0900
committerKukjin Kim <kgene.kim@samsung.com>2012-11-20 20:02:58 +0900
commitd40dc9ebbbd2e53690c907a0f4d131743bb68da9 (patch)
tree9838db4062b5ecc20d8c701524ca5ef2c6b0d807 /arch/arm/mach-s3c24xx/clock-s3c2443.c
parent868b2f23749d21737ff0c292175da42dce106b22 (diff)
downloadlinux-d40dc9ebbbd2e53690c907a0f4d131743bb68da9.tar.gz
ARM: S3C24XX: SPI clock channel setup is fixed for S3C2443
Actually, SPI channel 0 on 2443 is mapped to HS SPI controller, and to enable s3c2410-spi controller, we should power on channel 1 in PCLKCON. There is no channel 0 SPI on s3c2443, so delete its clock. Signed-off-by: Alexander Varnin <fenixk19@mail.ru> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c24xx/clock-s3c2443.c')
-rw-r--r--arch/arm/mach-s3c24xx/clock-s3c2443.c6
1 files changed, 0 insertions, 6 deletions
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2443.c b/arch/arm/mach-s3c24xx/clock-s3c2443.c
index 7f689ce1be6..bdaba59b42d 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2443.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2443.c
@@ -158,12 +158,6 @@ static struct clk init_clocks_off[] = {
.devname = "s3c2410-spi.0",
.parent = &clk_p,
.enable = s3c2443_clkcon_enable_p,
- .ctrlbit = S3C2443_PCLKCON_SPI0,
- }, {
- .name = "spi",
- .devname = "s3c2410-spi.1",
- .parent = &clk_p,
- .enable = s3c2443_clkcon_enable_p,
.ctrlbit = S3C2443_PCLKCON_SPI1,
}
};