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authorDavid Daney <ddaney@caviumnetworks.com>2010-10-01 13:27:34 -0700
committerRalf Baechle <ralf@linux-mips.org>2010-10-29 19:08:32 +0100
commitb93b2abce497873be97d765b848e0a955d29f200 (patch)
tree0372a9162b8bbf67f5a5f7367a1da2001ea0292c /arch/mips/cavium-octeon/Kconfig
parentee71b7d2f834d5e4b3a43001b2fa88743ed71a2c (diff)
download96b-common-b93b2abce497873be97d765b848e0a955d29f200.tar.gz
MIPS: Octeon: Rewrite DMA mapping functions.
All Octeon chips can support more than 4GB of RAM. Also due to how Octeon PCI is setup, even some configurations with less than 4GB of RAM will have portions that are not accessible from 32-bit devices. Enable the swiotlb code to handle the cases where a device cannot directly do DMA. This is a complete rewrite of the Octeon DMA mapping code. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1639/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/cavium-octeon/Kconfig')
-rw-r--r--arch/mips/cavium-octeon/Kconfig12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/mips/cavium-octeon/Kconfig b/arch/mips/cavium-octeon/Kconfig
index 47323ca452dc..475156b0c807 100644
--- a/arch/mips/cavium-octeon/Kconfig
+++ b/arch/mips/cavium-octeon/Kconfig
@@ -87,3 +87,15 @@ config ARCH_SPARSEMEM_ENABLE
config CAVIUM_OCTEON_HELPER
def_bool y
depends on OCTEON_ETHERNET || PCI
+
+config IOMMU_HELPER
+ bool
+
+config NEED_SG_DMA_LENGTH
+ bool
+
+config SWIOTLB
+ def_bool y
+ depends on CPU_CAVIUM_OCTEON
+ select IOMMU_HELPER
+ select NEED_SG_DMA_LENGTH