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authorEnric Balletbo i Serra <enric.balletbo@collabora.com>2018-07-14 14:09:22 -0300
committerHeiko Stuebner <heiko@sntech.de>2018-07-16 18:45:52 +0200
commit65abc845873a6a1b8923686e7e014167ac962c64 (patch)
tree57e9226eb90b657857df20e9cfb295a22353ac97 /arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
parent874846f1fccd67bff1fcb243b25f279f5c95f9d6 (diff)
download96b-common-65abc845873a6a1b8923686e7e014167ac962c64.tar.gz
arm64: dts: rockchip: add USB 2.0 and 3.0 support on Ficus board
The board exposes two types A ports, one is USB 3.0, up to 5.0Gbps and another one is USB 2.0 up to 480Mbps. Enable the USB PHYs and the USB controllers to enable theses devices. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3399-ficus.dts')
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399-ficus.dts88
1 files changed, 88 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
index 0d14183dd4a9..890b9e13cfe8 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
@@ -61,6 +61,19 @@
vin-supply = <&vcc3v3_sys>;
};
+ vcc5v0_host: vcc5v0-host-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio4 27 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&host_vbus_drv>;
+ regulator-name = "vcc5v0_host";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ vin-supply = <&vcc_sys>;
+ };
+
vdd_log: vdd-log {
compatible = "pwm-regulator";
pwms = <&pwm2 0 25000 0>;
@@ -454,6 +467,13 @@
<1 14 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
+
+ usb2 {
+ host_vbus_drv: host-vbus-drv {
+ rockchip,pins =
+ <4 27 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
};
&pwm2 {
@@ -487,6 +507,40 @@
status = "okay";
};
+&tcphy0 {
+ status = "okay";
+};
+
+&tcphy1 {
+ status = "okay";
+};
+
+&u2phy0 {
+ status = "okay";
+};
+
+&u2phy1 {
+ status = "okay";
+};
+
+&u2phy0_host {
+ phy-supply = <&vcc5v0_host>;
+ status = "okay";
+};
+
+&u2phy1_host {
+ phy-supply = <&vcc5v0_host>;
+ status = "okay";
+};
+
+&u2phy0_otg {
+ status = "okay";
+};
+
+&u2phy1_otg {
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_xfer &uart0_cts>;
@@ -497,6 +551,40 @@
status = "okay";
};
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
+
+&usbdrd3_0 {
+ status = "okay";
+};
+
+&usbdrd_dwc3_0 {
+ status = "okay";
+ dr_mode = "host";
+};
+
+&usbdrd3_1 {
+ status = "okay";
+};
+
+&usbdrd_dwc3_1 {
+ status = "okay";
+ dr_mode = "host";
+};
+
&vopb {
status = "okay";
};