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2015-05-18ARM: ux500: define the backupram in the device treedt-for-armsocLinus Walleij
The Ux500 SOCs have a special backup RAM that needs to be defined in the device tree. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-05-18ARM: ux500: add board documentationLinus Walleij
This documents the device tree bindings on the top level of the Ux500 boards. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-05-18ARM: scu: document Snoop Control Unit DT bindingsLinus Walleij
This adds device tree bindings for the ARM Cortex-A5 and Cortex-A9 Snoop Control Units. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-05-15ARM: dts: Add DT for Hitex LPC4350 Evaluation BoardAriel D'Alessandro
Add basic support for Hitex LPC4350 Evaluation Board. Board features a LPC4350 Soc, 8 MB SDRAM, 8 MB SPI Flash, USB and Ethernet. More information can be found on: http://www.hitex.com/index.php?id=3212 Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@gmail.com> Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-05-15ARM: dts: Add DT for Embedded Artists LPC4357 Developers KitJoachim Eastwood
Adds basic support for Embedded Artists' LPC4357 Developer's Kit. Board features a LPC4357 Soc, 32 MB SDRAM, 128 MB NAND Flash, 16 MB SPI Flash, USB and Ethernet. More information can be found on: http://www.embeddedartists.com/products/kits/lpc4357_kit.php Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-05-15ARM: dts: Add base DT for NXP LPC18xxJoachim Eastwood
NXP LPC18xx/43xx SoCs are very similar devices and should be able to share a common base (lpc18xx.dtsi). Diffences between the devices are put in a dtsi which is specific to that device. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-05-15ARM: dts: Add ARM System timer as clocksource in armv7mMaxime Coquelin
Tested-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-05-15Merge tag 'mvebu-dt-4.2' of git://git.infradead.org/linux-mvebu into next/dtArnd Bergmann
Merge "mvebu dt changes for v4.2 (part #1)" from Gregory CLEMENT: - A series adding support for the Compulab CM-A510 - Add alias for mdio on Armada 38x * tag 'mvebu-dt-4.2' of git://git.infradead.org/linux-mvebu: ARM: mvebu: add alias for mdio on Armada 38x ARM: dts: dove: Add Compulab SBC-A510 to Makefile ARM: dts: dove: Add proper support for Compulab CM-A510/SBC-A510 ARM: dts: dove: Remove Compulab CM-A510 from Makefile ARM: dts: dove: Add internal i2c multiplexer node
2015-05-15Merge tag 'sti-dt-for-v4.2-2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti into next/dt Merge "STi DT updates for v4.2, round 2." from Maxime Coquelin: Highlights: ----------- - Add USB3 support to STiH410 & STiH418 - Add PWM support to STiH416 & STiH407 family - Add restart support to STiH416 & STiH407 family - Add PMU support to STiH416 & STiH407 family - Reorder includes in STiH407 DT files * tag 'sti-dt-for-v4.2-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti: ARM: STi: DT: STih407: Re-order #include <*.dtsi> files ARM: STi: Ensure requested STi's SysCfg Controlled IRQs are enabled at boot ARM: STi: STiH407: Enable PMU IRQs ARM: STi: STiH407: Enable Cortex-A9 PMU support ARM: STi: STiH416: Enable PMU IRQs ARM: STi: STiH416: Enable Cortex-A9 PMU support ARM: STi: STiH416: Add Restart support for STiH416 ARM: STi: STiH407: Add Restart support for STiH407 ARM: STi: STiH416-b2020e: Enable PWM on the B2020 Rev-E ARM: STi: STiH416: Add DT nodes for PWM ARM: STi: STiH416: Add Pinctrl settings for PWM ARM: STi: STiH407: Add DT nodes for for PWM ARM: DT: STi: STiH418: Enable USB3 port on stih418-b2199. ARM: DT: STi: STiH418: Add miphy28lp optional oscillator clock properties ARM: DT: STi: stihxxx-b2120: Enable USB3 port on stih407-b2120 and stih410-b2120 ARM: DT: STi: STiH407: Add dwc3 usb3 DT node. ARM: DT: STi: STiH407: Update picophyreset for the usb3 controllers usb2 phy
2015-05-15Merge tag 'rpi-dt-for-armsoc-v4.2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/rpi/linux-rpi into next/dt Merge "RaspberryPi Device Tree changes due for v4.2" from Lee Jones: * tag 'rpi-dt-for-armsoc-v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/rpi/linux-rpi: ARM: bcm2835: dt: Use 0x4 prefix for DMA bus addresses to SDRAM. ARM: bcm2835: dt: Add the mailbox to the device tree ARM: bcm2835: dt: Fix i2c0 node name ARM: bcm2835: dt: Use pinctrl header ARM: bcm2835: dt: Add header file for pinctrl constants ARM: bcm2835: dt: Add root properties for Raspberry Pi ARM: bcm2835: dt: Add vendor prefix for Raspberry Pi
2015-05-15ARM: ux500: add SCU and WD to device treeLinus Walleij
The Ux500 like other Cortex-A9 SoC's has a Snoop Control Unit (SCU) and a Watchdog in the same address range as the local timers. Add these to the SoC device tree. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-05-15Merge tag 'renesas-dt-for-v4.2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Merge "Renesas ARM Based SoC DT Updates for v4.2" from Simon Horman: * Enable DMA for HSUSB on r8a7790 and r8a7791 SoCs * Configure the HOME key as wake-up source on kzm9g board * Use generic names for device nodes on SH Mobile SoCs and boards * Add "nor-jedec" compatible value to SH Mobile boards * Add IRQC clock to r8a73a4, r8a779* SoCs * Remove MSIOF address from r8a7790 and r8a7791 SoCs * tag 'renesas-dt-for-v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (31 commits) ARM: shmobile: r8a7791: Enable DMA for HSUSB ARM: shmobile: r8a7791: add USB-DMAC device nodes ARM: shmobile: r8a7790: Enable DMA for HSUSB ARM: shmobile: r8a7790: add USB-DMAC device nodes ARM: shmobile: kzm9g dts: Configure the HOME key as wake-up source ARM: shmobile: koelsch dts: Use generic names for device nodes ARM: shmobile: lager dts: Use generic names for device nodes ARM: shmobile: bockw dts: Use generic names for device nodes ARM: shmobile: koelsch dts: Add "nor-jedec" compatible value ARM: shmobile: bockw dts: Add "nor-jedec" compatible value ARM: shmobile: lager dts: Add "nor-jedec" compatible value ARM: shmobile: bockw-reference dts: Add "nor-jedec" compatible value ARM: shmobile: henninger dts: Add "nor-jedec" compatible value ARM: shmobile: armadillo800eva dts: Use generic names for device nodes ARM: shmobile: marzen dts: Use generic names for device nodes ARM: shmobile: kzm9d dts: Use generic names for device nodes ARM: shmobile: ape6evm dts: Use generic names for device nodes ARM: shmobile: sh73a0 dtsi: Use generic names for device nodes ARM: shmobile: r8a7791 dtsi: Use generic names for device nodes ARM: shmobile: r8a7790 dtsi: Use generic names for device nodes ...
2015-05-15Merge tag 'pxa-dt-4.2' of https://github.com/rjarzmik/linux into next/dtArnd Bergmann
Merge "device-tree pxa update" from Robert Jarzmik: - clocks descriptions (pxa27x, pxa3xx) - timer descriptions (pxa27x, pxa3xx) - IPs which are embedded on the SoC - keypad - udc (USB client) - power I2C These are amongst the building blocks for future pxa device-tree board description. * tag 'pxa-dt-4.2' of https://github.com/rjarzmik/linux: ARM: dts: pxa: add pxa-timer to pxa27x and pxa3xx ARM: dts: pxa: add pxa27x-keypad to pxa27x ARM: dts: pxa: add pxa27x-udc to pxa27x ARM: dts: pxa: add clocks ARM: dts: pxa: add pwri2c to pxa device-tree
2015-05-15Merge tag 'arm-soc/for-4.2/dts' of http://github.com/broadcom/stblinux into ↵Arnd Bergmann
next/dt Merge "Device Tree changes" from Florian Fainelli: New devices: - Felix adds support for the Buffalo WXR-1900DHP and adds the USB led on Buffalo WZR-1750DHP - Rafal adds support for the SmartRG SR400ac, Asus RT-AC68U and RT-AC56U New peripheral support: - Brian adds Device Tree nodes for the Broadcom NAND controller found on BCM7xxx, BCM63138 and Cygnus SoCs - Brian adds Device Tree nodes for the SATA AHCI and PHY controller found on BCM7xxx - I add the Device Tree nodes and bindings documents for bringing-up secondary CPUs and timer/syscon-reboot on BCM63138 * tag 'arm-soc/for-4.2/dts' of http://github.com/broadcom/stblinux: ARM: BCM5301X: Add DT for Asus RT-AC56U ARM: BCM5301X: Add DT for Asus RT-AC68U ARM: dts: BCM63xx: Add timer and syscon-reboot nodes dt-bindings: Add documentation for the BCM63138 timer and syscon-reboot ARM: dts: brcmstb: add nodes for SATA controller and PHY ARM: dts: cygnus: Enable NAND support for Cygnus ARM: bcm63138: add NAND DT support ARM: bcm7445: add NAND to DTS ARM: BCM5301X: Add DT for SmartRG SR400ac ARM: BCM5301X: Add DT for Buffalo WXR-1900DHP ARM: BCM5301X: Add USB LED for Buffalo WZR-1750DHP ARM: dts: BCM63xx: Add SMP nodes and required properties Documentation: DT: Document SMP DT nodes and properties for BCM63138 ARM: dts: BCM63xx: Add PMB busses nodes Documentation: DT: Add Broadcom BCM63138 PMB binding
2015-05-14ARM: STi: DT: STih407: Re-order #include <*.dtsi> filesLee Jones
This patch fixes a regression where serial is enabled by the first (board) DTSI, then disabled by the second (SoC) file. To enable serial and keep it enabled, we need to include the file which enables it last. Reported-by: LAVA [via Peter Griffin <peter.griffin@linaro.org>] Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-05-14ARM: bcm2835: dt: Use 0x4 prefix for DMA bus addresses to SDRAM.Eric Anholt
There exists a tiny MMU, configurable only by the VC (running the closed firmware), which maps from the ARM's physical addresses to bus addresses. These bus addresses determine the caching behavior in the VC's L1/L2 (note: separate from the ARM's L1/L2) according to the top 2 bits. The bits in the bus address mean: From the VideoCore processor: 0x0... L1 and L2 cache allocating and coherent 0x4... L1 non-allocating, but coherent. L2 allocating and coherent 0x8... L1 non-allocating, but coherent. L2 non-allocating, but coherent 0xc... SDRAM alias. Cache is bypassed. Not L1 or L2 allocating or coherent From the GPU peripherals (note: all peripherals bypass the L1 cache. The ARM will see this view once through the VC MMU): 0x0... Do not use 0x4... L1 non-allocating, and incoherent. L2 allocating and coherent. 0x8... L1 non-allocating, and incoherent. L2 non-allocating, but coherent 0xc... SDRAM alias. Cache is bypassed. Not L1 or L2 allocating or coherent The 2835 firmware always configures the MMU to turn ARM physical addresses with 0x0 top bits to 0x4, meaning present in L2 but incoherent with L1. However, any bus addresses we were generating in the kernel to be passed to a device had 0x0 bits. That would be a reserved (possibly totally incoherent) value if sent to a GPU peripheral like USB, or L1 allocating if sent to the VC (like a firmware property request). By setting dma-ranges, all of the devices below it get a dev->dma_pfn_offset, so that dma_alloc_coherent() and friends return addresses with 0x4 bits and avoid cache incoherency. This matches the behavior in the downstream 2708 kernel (see BUS_OFFSET in arch/arm/mach-bcm2708/include/mach/memory.h). Signed-off-by: Eric Anholt <eric@anholt.net> Tested-by: Noralf Trønnes <noralf@tronnes.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-05-14ARM: bcm2835: dt: Add the mailbox to the device treeEric Anholt
Signed-off-by: Eric Anholt <eric@anholt.net> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-05-14ARM: bcm2835: dt: Fix i2c0 node nameBaruch Siach
Device tree node names should contain the node's reg property address value. The i2c0 node was apparently forgotten in commit 25b2f1bd0b7e0 (ARM: bcm2835: node name unit address cleanup). Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-05-14ARM: bcm2835: dt: Use pinctrl headerStefan Wahren
This patch converts all bcm2835 dts and dtsi files to use the pinctrl header file. Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-05-14ARM: bcm2835: dt: Add header file for pinctrl constantsStefan Wahren
This new header file defines pincontrol constants to use from bcm2835 DTS files for pincontrol properties option. Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-05-14ARM: bcm2835: dt: Add root properties for Raspberry PiStefan Wahren
This patch adds root compatible properties for the following boards: - Raspberry Pi Model A - Raspberry Pi Model A+ - Raspberry Pi Model B - Raspberry Pi Model B (no P5) - Raspberry Pi Model B rev2 - Raspberry Pi Model B+ - Raspberry Pi Compute Module Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-05-14ARM: bcm2835: dt: Add vendor prefix for Raspberry PiStefan Wahren
Since the prefix is already in use, we need to add it in the vendor list. Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-05-13ARM: BCM5301X: Add DT for Asus RT-AC56URafał Miłecki
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-05-13ARM: BCM5301X: Add DT for Asus RT-AC68URafał Miłecki
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-05-13ARM: dts: BCM63xx: Add timer and syscon-reboot nodesFlorian Fainelli
Add a "brcm,bcm6328-timer" and "syscon-reboot" nodes to allow the generic syscon-reboot driver to reset a BCM63138 SoC. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-05-13dt-bindings: Add documentation for the BCM63138 timer and syscon-rebootFlorian Fainelli
A timer node and a syscon-reboot node are required for software reboot to work on BCM63138, document these two nodes in the platform binding. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-05-13ARM: dts: brcmstb: add nodes for SATA controller and PHYBrian Norris
Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-05-13ARM: dts: cygnus: Enable NAND support for CygnusRay Jui
Enable NAND support for Broadcom Cygnus SoC Signed-off-by: Ray Jui <rjui@broadcom.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-05-13ARM: bcm63138: add NAND DT supportBrian Norris
Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Tested-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-05-13ARM: bcm7445: add NAND to DTSBrian Norris
Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-05-13ARM: BCM5301X: Add DT for SmartRG SR400acRafał Miłecki
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-05-13ARM: BCM5301X: Add DT for Buffalo WXR-1900DHPFelix Fietkau
Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-05-13ARM: BCM5301X: Add USB LED for Buffalo WZR-1750DHPFelix Fietkau
Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-05-13ARM: dts: BCM63xx: Add SMP nodes and required propertiesFlorian Fainelli
Update bcm63138.dtsi with the following: - enable-method for both CPU nodes - brcm,bcm63138-bootlut node - resets properties to point to the correct PMB controller to release the secondary CPU from reset Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-05-13Documentation: DT: Document SMP DT nodes and properties for BCM63138Florian Fainelli
Add binding documentation for the additional nodes and properties required to get the secondary CPU online on the BCM63138 SoC. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-05-13ARM: dts: BCM63xx: Add PMB busses nodesFlorian Fainelli
Add the two BCM63138 PMB busses nodes found on this System-on-a-Chip as described in their corresponding binding document. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-05-13Documentation: DT: Add Broadcom BCM63138 PMB bindingFlorian Fainelli
Add a Device Tree binding for the Broadcom BCM63138 Processor Monitor Bus, which is an internal bus used to access different power and reset signals within a BCM63138 System-on-a-Chip. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-05-13Merge tag 'tegra-for-4.2-dt' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt Merge "ARM: tegra: Devicetree changes for v4.2-rc1" from Thierry Reding: Contains a couple of fixes and additions to device tree files. The most notable change is a fix for a misapplied patch that was only exposed by a recent change in the regulator subsystem that caused USB to break on Tegra124 recently. Other than that there are a more or less random assortment of additions to enable various features on a couple of boards. * tag 'tegra-for-4.2-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: tegra: Fix hda2codec_2x clock and reset names ARM: tegra: Add Tegra30 HDA support ARM: tegra: Cardhu device-tree comment spelling fix ARM: tegra: venice2: Set min-/max-microvolt for VDD_LED supply ARM: tegra: venice2: Mark eMMC as non-removable ARM: tegra: jetson-tk1: Enable HDA support ARM: tegra: Add missing HDMI +5V regulator ARM: tegra: cardhu: Add power and volume keys ARM: tegra: Correct which USB controller has the UTMI pad registers
2015-05-13Merge tag 'socfpga_dts_for_v4.2_part_2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt Merge "SoCFPGA update for v4.2 part 2" from Dinh Nguyen: - Add a DTS node for the A9 SCU * tag 'socfpga_dts_for_v4.2_part_2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: ARM: socfpga: dts: add the a9-scu node
2015-05-13Merge tag 'v4.2-rockchip-dts1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt Merge "ARM: rockchip: dts changes for 4.2" from Heiko Stuebner: Some misc improvements defining additional supply regulators, enabling the Cortex-A12 HW PMU on the rk3288 and the tsadc on some more rk3288 boards, as well as some usb properties and marking the radxarock pmic as system-power-controller. * tag 'v4.2-rockchip-dts1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: add system-power-controller to act8846 on radxarock ARM: dts: rockchip: add properties for dwc2 usb otg controller ARM: dts: rockchip: enable tsadc on rk3288 boards ARM: dts: rockchip: add act8846 supplies on rk3288-firefly ARM: dts: rockchip: Specify VMMC and VQMMC on rk3288-evb ARM: dts: rockchip: Enable Cortex-A12 HW PMU events on rk3288
2015-05-13ARM: socfpga: dts: add the a9-scu nodeDinh Nguyen
Add the dts node for the A9 SCU. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-05-13Merge tag 'ux500-v4.2-dt' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/dt Merge "Ux500 Device Tree changes for the v4.2 series" form Linus Walleij: Define CPU topology, connect that with CoreSight blocks, add sensor information to DT boards. * tag 'ux500-v4.2-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: ARM: ux500: add the sensors to the STUIB board ARM: ux500: assign the sensor trigger IRQs ARM: ux500: fix lsm303dlh magnetometer compat string ARM: ux500: add CoreSight blocks to DTS file ARM: ux500: define CPU topology
2015-05-13ARM: ux500: add the sensors to the STUIB boardLinus Walleij
This adds the device tree data for the LIS331DL and the AK8974 magnetometer to the STUIB board device tree include file. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-05-13ARM: ux500: assign the sensor trigger IRQsLinus Walleij
The ST sensors on the Ux500 boards were not utilizing the IRQs for data ready sample triggers. Enable this by assigning the right GPIO lines and interrupt lines (when the GPIO lines are used for IRQs) to the accelerometer, gyro and magnetometer sensors. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-05-13ARM: ux500: fix lsm303dlh magnetometer compat stringLinus Walleij
The magnetometer found on the Ux500 TVK and Snowball boards is a LSM303DLH not a LSM303DLM, small differences but still different. Put in the right compatible strings and things start working smoothly. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-05-13ARM: ux500: add CoreSight blocks to DTS fileLinus Walleij
This registers all the CoreSight blocks on the DB8500 SoC: each core has a PTM (v1.0, r1p0-00rel0) connected, both connected to a funnel (DK-TM908-r0p1-00rel0) which in turn connects to a replicator (DM-TM909-r0p1-00rel0). The replicator has two outputs, port 0 to a TPIU interface and port 1 to an ETB (DK-TM907-r0p3-00rel0). The CoreSight blocks are all clocked by the APEATCLK from the PRCMU and their AHB interconnect is clocked from a separate clock called APETRACECLK. The SoC also has a CTI/CTM block which can be added later as we have upstream support in the CoreSight subsystem. Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-05-13ARM: STi: Ensure requested STi's SysCfg Controlled IRQs are enabled at bootLee Jones
This driver is used to enable System Configuration Register controlled External, CTI (Core Sight), PMU (Performance Management), and PL310 L2 Cache IRQs prior to use. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-05-13ARM: STi: STiH407: Enable PMU IRQsLee Jones
This driver is used to enable System Configuration Register controlled External, CTI (Core Sight), PMU (Performance Management), and PL310 L2 Cache IRQs prior to use. Here we are enabling PMU IRQs on both channels. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-05-13ARM: STi: STiH407: Enable Cortex-A9 PMU supportLee Jones
This is ARM's generic Performance Monitoring Unit. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-05-13ARM: STi: STiH416: Enable PMU IRQsLee Jones
This driver is used to enable System Configuration Register controlled External, CTI (Core Sight), PMU (Performance Management), and PL310 L2 Cache IRQs prior to use. Here we are enabling PMU IRQs on both channels. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>