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-rw-r--r--arch/sh/cchips/Kconfig96
-rw-r--r--arch/sh/cchips/hd6446x/hd64461/Makefile6
-rw-r--r--arch/sh/cchips/hd6446x/hd64461/io.c157
-rw-r--r--arch/sh/cchips/hd6446x/hd64461/setup.c171
-rw-r--r--arch/sh/cchips/hd6446x/hd64465/Makefile6
-rw-r--r--arch/sh/cchips/hd6446x/hd64465/gpio.c196
-rw-r--r--arch/sh/cchips/hd6446x/hd64465/io.c216
-rw-r--r--arch/sh/cchips/hd6446x/hd64465/setup.c202
-rw-r--r--arch/sh/cchips/voyagergx/Makefile8
-rw-r--r--arch/sh/cchips/voyagergx/consistent.c126
-rw-r--r--arch/sh/cchips/voyagergx/irq.c194
-rw-r--r--arch/sh/cchips/voyagergx/setup.c37
12 files changed, 1415 insertions, 0 deletions
diff --git a/arch/sh/cchips/Kconfig b/arch/sh/cchips/Kconfig
new file mode 100644
index 000000000000..155d139884c3
--- /dev/null
+++ b/arch/sh/cchips/Kconfig
@@ -0,0 +1,96 @@
+menu "Companion Chips"
+
+config VOYAGERGX
+ bool "VoyagerGX chip support"
+ depends on SH_RTS7751R2D
+ help
+ Selecting this option will support Silicon Motion, Inc. SM501.
+ Designed to complement needs for the embedded industry, it
+ provides video and 2D capability. To reduce system cost a
+ wide variety of include I/O is supported, including analog RGB
+ and digital LCD Panel interface, 8-bit parallel interface, USB,
+ UART, IrDA, Zoom Video, AC97 or I2S, SSP, PWM, and I2C. There
+ are additional GPIO bits that can be used to interface to
+ external as well.
+
+# A board must have defined HD6446X_SERIES in order to see these
+config HD6446X_SERIES
+ bool "HD6446x support"
+ default n
+
+choice
+ prompt "HD6446x options"
+ depends on HD6446X_SERIES
+ default HD64461
+
+config HD64461
+ bool "Hitachi HD64461 companion chip support"
+ depends on CPU_SUBTYPE_SH7709
+ ---help---
+ The Hitachi HD64461 provides an interface for
+ the SH7709 CPU, supporting a LCD controller,
+ CRT color controller, IrDA up to 4 Mbps, and a
+ PCMCIA controller supporting 2 slots.
+
+ More information is available at
+ <http://semiconductor.hitachi.com/windowsce/superh/sld013.htm>.
+
+ Say Y if you want support for the HD64461.
+ Otherwise, say N.
+
+config HD64465
+ bool "Hitachi HD64465 companion chip support"
+ depends on CPU_SUBTYPE_SH7750
+ ---help---
+ The Hitachi HD64465 provides an interface for
+ the SH7750 CPU, supporting a LCD controller,
+ CRT color controller, IrDA, USB, PCMCIA,
+ keyboard controller, and a printer interface.
+
+ More information is available at
+ <http://global.hitachi.com/New/cnews/E/1998/981019B.html>.
+
+ Say Y if you want support for the HD64465.
+ Otherwise, say N.
+
+endchoice
+
+# These will also be split into the Kconfig's below
+config HD64461_IRQ
+ int "HD64461 IRQ"
+ depends on HD64461
+ default "36"
+ help
+ The default setting of the HD64461 IRQ is 36.
+
+ Do not change this unless you know what you are doing.
+
+config HD64461_ENABLER
+ bool "HD64461 PCMCIA enabler"
+ depends on HD64461
+ help
+ Say Y here if you want to enable PCMCIA support
+ via the HD64461 companion chip.
+ Otherwise, say N.
+
+
+config HD64465_IOBASE
+ hex "HD64465 start address"
+ depends on HD64465
+ default "0xb0000000"
+ help
+ The default setting of the HD64465 IO base address is 0xb0000000.
+
+ Do not change this unless you know what you are doing.
+
+config HD64465_IRQ
+ int "HD64465 IRQ"
+ depends on HD64465
+ default "5"
+ help
+ The default setting of the HD64465 IRQ is 5.
+
+ Do not change this unless you know what you are doing.
+
+endmenu
+
diff --git a/arch/sh/cchips/hd6446x/hd64461/Makefile b/arch/sh/cchips/hd6446x/hd64461/Makefile
new file mode 100644
index 000000000000..bff4b92e388c
--- /dev/null
+++ b/arch/sh/cchips/hd6446x/hd64461/Makefile
@@ -0,0 +1,6 @@
+#
+# Makefile for the HD64461
+#
+
+obj-y := setup.o io.o
+
diff --git a/arch/sh/cchips/hd6446x/hd64461/io.c b/arch/sh/cchips/hd6446x/hd64461/io.c
new file mode 100644
index 000000000000..4c062d6b7a97
--- /dev/null
+++ b/arch/sh/cchips/hd6446x/hd64461/io.c
@@ -0,0 +1,157 @@
+/*
+ * $Id: io.c,v 1.6 2004/03/16 00:07:50 lethal Exp $
+ * Copyright (C) 2000 YAEGASHI Takeshi
+ * Typical I/O routines for HD64461 system.
+ */
+
+#include <linux/config.h>
+#include <asm/io.h>
+#include <asm/hd64461/hd64461.h>
+
+#define MEM_BASE (CONFIG_HD64461_IOBASE - HD64461_STBCR)
+
+static __inline__ unsigned long PORT2ADDR(unsigned long port)
+{
+ /* 16550A: HD64461 internal */
+ if (0x3f8<=port && port<=0x3ff)
+ return CONFIG_HD64461_IOBASE + 0x8000 + ((port-0x3f8)<<1);
+ if (0x2f8<=port && port<=0x2ff)
+ return CONFIG_HD64461_IOBASE + 0x7000 + ((port-0x2f8)<<1);
+
+#ifdef CONFIG_HD64461_ENABLER
+ /* NE2000: HD64461 PCMCIA channel 0 (I/O) */
+ if (0x300<=port && port<=0x31f)
+ return 0xba000000 + port;
+
+ /* ide0: HD64461 PCMCIA channel 1 (memory) */
+ /* On HP690, CF in slot 1 is configured as a memory card
+ device. See CF+ and CompactFlash Specification for the
+ detail of CF's memory mapped addressing. */
+ if (0x1f0<=port && port<=0x1f7) return 0xb5000000 + port;
+ if (port == 0x3f6) return 0xb50001fe;
+ if (port == 0x3f7) return 0xb50001ff;
+
+ /* ide1 */
+ if (0x170<=port && port<=0x177) return 0xba000000 + port;
+ if (port == 0x376) return 0xba000376;
+ if (port == 0x377) return 0xba000377;
+#endif
+
+ /* ??? */
+ if (port < 0xf000) return 0xa0000000 + port;
+ /* PCMCIA channel 0, I/O (0xba000000) */
+ if (port < 0x10000) return 0xba000000 + port - 0xf000;
+
+ /* HD64461 internal devices (0xb0000000) */
+ if (port < 0x20000) return CONFIG_HD64461_IOBASE + port - 0x10000;
+
+ /* PCMCIA channel 0, I/O (0xba000000) */
+ if (port < 0x30000) return 0xba000000 + port - 0x20000;
+
+ /* PCMCIA channel 1, memory (0xb5000000) */
+ if (port < 0x40000) return 0xb5000000 + port - 0x30000;
+
+ /* Whole physical address space (0xa0000000) */
+ return 0xa0000000 + (port & 0x1fffffff);
+}
+
+static inline void delay(void)
+{
+ ctrl_inw(0xa0000000);
+}
+
+unsigned char hd64461_inb(unsigned long port)
+{
+ return *(volatile unsigned char*)PORT2ADDR(port);
+}
+
+unsigned char hd64461_inb_p(unsigned long port)
+{
+ unsigned long v = *(volatile unsigned char*)PORT2ADDR(port);
+ delay();
+ return v;
+}
+
+unsigned short hd64461_inw(unsigned long port)
+{
+ return *(volatile unsigned short*)PORT2ADDR(port);
+}
+
+unsigned int hd64461_inl(unsigned long port)
+{
+ return *(volatile unsigned long*)PORT2ADDR(port);
+}
+
+void hd64461_outb(unsigned char b, unsigned long port)
+{
+ *(volatile unsigned char*)PORT2ADDR(port) = b;
+}
+
+void hd64461_outb_p(unsigned char b, unsigned long port)
+{
+ *(volatile unsigned char*)PORT2ADDR(port) = b;
+ delay();
+}
+
+void hd64461_outw(unsigned short b, unsigned long port)
+{
+ *(volatile unsigned short*)PORT2ADDR(port) = b;
+}
+
+void hd64461_outl(unsigned int b, unsigned long port)
+{
+ *(volatile unsigned long*)PORT2ADDR(port) = b;
+}
+
+void hd64461_insb(unsigned long port, void *buffer, unsigned long count)
+{
+ volatile unsigned char* addr=(volatile unsigned char*)PORT2ADDR(port);
+ unsigned char *buf=buffer;
+ while(count--) *buf++=*addr;
+}
+
+void hd64461_insw(unsigned long port, void *buffer, unsigned long count)
+{
+ volatile unsigned short* addr=(volatile unsigned short*)PORT2ADDR(port);
+ unsigned short *buf=buffer;
+ while(count--) *buf++=*addr;
+}
+
+void hd64461_insl(unsigned long port, void *buffer, unsigned long count)
+{
+ volatile unsigned long* addr=(volatile unsigned long*)PORT2ADDR(port);
+ unsigned long *buf=buffer;
+ while(count--) *buf++=*addr;
+}
+
+void hd64461_outsb(unsigned long port, const void *buffer, unsigned long count)
+{
+ volatile unsigned char* addr=(volatile unsigned char*)PORT2ADDR(port);
+ const unsigned char *buf=buffer;
+ while(count--) *addr=*buf++;
+}
+
+void hd64461_outsw(unsigned long port, const void *buffer, unsigned long count)
+{
+ volatile unsigned short* addr=(volatile unsigned short*)PORT2ADDR(port);
+ const unsigned short *buf=buffer;
+ while(count--) *addr=*buf++;
+}
+
+void hd64461_outsl(unsigned long port, const void *buffer, unsigned long count)
+{
+ volatile unsigned long* addr=(volatile unsigned long*)PORT2ADDR(port);
+ const unsigned long *buf=buffer;
+ while(count--) *addr=*buf++;
+}
+
+unsigned short hd64461_readw(unsigned long addr)
+{
+ return *(volatile unsigned short*)(MEM_BASE+addr);
+}
+
+void hd64461_writew(unsigned short b, unsigned long addr)
+{
+ *(volatile unsigned short*)(MEM_BASE+addr) = b;
+}
+
diff --git a/arch/sh/cchips/hd6446x/hd64461/setup.c b/arch/sh/cchips/hd6446x/hd64461/setup.c
new file mode 100644
index 000000000000..f014b9bf6922
--- /dev/null
+++ b/arch/sh/cchips/hd6446x/hd64461/setup.c
@@ -0,0 +1,171 @@
+/*
+ * $Id: setup.c,v 1.5 2004/03/16 00:07:50 lethal Exp $
+ * Copyright (C) 2000 YAEGASHI Takeshi
+ * Hitachi HD64461 companion chip support
+ */
+
+#include <linux/config.h>
+#include <linux/sched.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+
+#include <asm/io.h>
+#include <asm/irq.h>
+
+#include <asm/hd64461/hd64461.h>
+
+static void disable_hd64461_irq(unsigned int irq)
+{
+ unsigned long flags;
+ unsigned short nimr;
+ unsigned short mask = 1 << (irq - HD64461_IRQBASE);
+
+ local_irq_save(flags);
+ nimr = inw(HD64461_NIMR);
+ nimr |= mask;
+ outw(nimr, HD64461_NIMR);
+ local_irq_restore(flags);
+}
+
+static void enable_hd64461_irq(unsigned int irq)
+{
+ unsigned long flags;
+ unsigned short nimr;
+ unsigned short mask = 1 << (irq - HD64461_IRQBASE);
+
+ local_irq_save(flags);
+ nimr = inw(HD64461_NIMR);
+ nimr &= ~mask;
+ outw(nimr, HD64461_NIMR);
+ local_irq_restore(flags);
+}
+
+static void mask_and_ack_hd64461(unsigned int irq)
+{
+ disable_hd64461_irq(irq);
+#ifdef CONFIG_HD64461_ENABLER
+ if (irq == HD64461_IRQBASE + 13)
+ outb(0x00, HD64461_PCC1CSCR);
+#endif
+}
+
+static void end_hd64461_irq(unsigned int irq)
+{
+ if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ enable_hd64461_irq(irq);
+}
+
+static unsigned int startup_hd64461_irq(unsigned int irq)
+{
+ enable_hd64461_irq(irq);
+ return 0;
+}
+
+static void shutdown_hd64461_irq(unsigned int irq)
+{
+ disable_hd64461_irq(irq);
+}
+
+static struct hw_interrupt_type hd64461_irq_type = {
+ .typename = "HD64461-IRQ",
+ .startup = startup_hd64461_irq,
+ .shutdown = shutdown_hd64461_irq,
+ .enable = enable_hd64461_irq,
+ .disable = disable_hd64461_irq,
+ .ack = mask_and_ack_hd64461,
+ .end = end_hd64461_irq,
+};
+
+static irqreturn_t hd64461_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+{
+ printk(KERN_INFO
+ "HD64461: spurious interrupt, nirr: 0x%x nimr: 0x%x\n",
+ inw(HD64461_NIRR), inw(HD64461_NIMR));
+
+ return IRQ_NONE;
+}
+
+static struct {
+ int (*func) (int, void *);
+ void *dev;
+} hd64461_demux[HD64461_IRQ_NUM];
+
+void hd64461_register_irq_demux(int irq,
+ int (*demux) (int irq, void *dev), void *dev)
+{
+ hd64461_demux[irq - HD64461_IRQBASE].func = demux;
+ hd64461_demux[irq - HD64461_IRQBASE].dev = dev;
+}
+
+EXPORT_SYMBOL(hd64461_register_irq_demux);
+
+void hd64461_unregister_irq_demux(int irq)
+{
+ hd64461_demux[irq - HD64461_IRQBASE].func = 0;
+}
+
+EXPORT_SYMBOL(hd64461_unregister_irq_demux);
+
+int hd64461_irq_demux(int irq)
+{
+ if (irq == CONFIG_HD64461_IRQ) {
+ unsigned short bit;
+ unsigned short nirr = inw(HD64461_NIRR);
+ unsigned short nimr = inw(HD64461_NIMR);
+ int i;
+
+ nirr &= ~nimr;
+ for (bit = 1, i = 0; i < 16; bit <<= 1, i++)
+ if (nirr & bit)
+ break;
+ if (i == 16)
+ irq = CONFIG_HD64461_IRQ;
+ else {
+ irq = HD64461_IRQBASE + i;
+ if (hd64461_demux[i].func != 0) {
+ irq = hd64461_demux[i].func(irq, hd64461_demux[i].dev);
+ }
+ }
+ }
+ return __irq_demux(irq);
+}
+
+static struct irqaction irq0 = { hd64461_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "HD64461", NULL, NULL };
+
+int __init setup_hd64461(void)
+{
+ int i;
+
+ if (!MACH_HD64461)
+ return 0;
+
+ printk(KERN_INFO
+ "HD64461 configured at 0x%x on irq %d(mapped into %d to %d)\n",
+ CONFIG_HD64461_IOBASE, CONFIG_HD64461_IRQ, HD64461_IRQBASE,
+ HD64461_IRQBASE + 15);
+
+#if defined(CONFIG_CPU_SUBTYPE_SH7709) /* Should be at processor specific part.. */
+ outw(0x2240, INTC_ICR1);
+#endif
+ outw(0xffff, HD64461_NIMR);
+
+ for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++) {
+ irq_desc[i].handler = &hd64461_irq_type;
+ }
+
+ setup_irq(CONFIG_HD64461_IRQ, &irq0);
+
+#ifdef CONFIG_HD64461_ENABLER
+ printk(KERN_INFO "HD64461: enabling PCMCIA devices\n");
+ outb(0x4c, HD64461_PCC1CSCIER);
+ outb(0x00, HD64461_PCC1CSCR);
+#endif
+
+ return 0;
+}
+
+module_init(setup_hd64461);
diff --git a/arch/sh/cchips/hd6446x/hd64465/Makefile b/arch/sh/cchips/hd6446x/hd64465/Makefile
new file mode 100644
index 000000000000..f66edcb52c5b
--- /dev/null
+++ b/arch/sh/cchips/hd6446x/hd64465/Makefile
@@ -0,0 +1,6 @@
+#
+# Makefile for the HD64465
+#
+
+obj-y := setup.o io.o gpio.o
+
diff --git a/arch/sh/cchips/hd6446x/hd64465/gpio.c b/arch/sh/cchips/hd6446x/hd64465/gpio.c
new file mode 100644
index 000000000000..9785fdef868e
--- /dev/null
+++ b/arch/sh/cchips/hd6446x/hd64465/gpio.c
@@ -0,0 +1,196 @@
+/*
+ * $Id: gpio.c,v 1.4 2003/05/19 22:24:18 lethal Exp $
+ * by Greg Banks <gbanks@pocketpenguins.com>
+ * (c) 2000 PocketPenguins Inc
+ *
+ * GPIO pin support for HD64465 companion chip.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/ioport.h>
+#include <asm/io.h>
+#include <asm/hd64465/gpio.h>
+
+#define _PORTOF(portpin) (((portpin)>>3)&0x7)
+#define _PINOF(portpin) ((portpin)&0x7)
+
+/* Register addresses parametrised on port */
+#define GPIO_CR(port) (HD64465_REG_GPACR+((port)<<1))
+#define GPIO_DR(port) (HD64465_REG_GPADR+((port)<<1))
+#define GPIO_ICR(port) (HD64465_REG_GPAICR+((port)<<1))
+#define GPIO_ISR(port) (HD64465_REG_GPAISR+((port)<<1))
+
+#define GPIO_NPORTS 5
+
+#define MODNAME "hd64465_gpio"
+
+EXPORT_SYMBOL(hd64465_gpio_configure);
+EXPORT_SYMBOL(hd64465_gpio_get_pin);
+EXPORT_SYMBOL(hd64465_gpio_get_port);
+EXPORT_SYMBOL(hd64465_gpio_register_irq);
+EXPORT_SYMBOL(hd64465_gpio_set_pin);
+EXPORT_SYMBOL(hd64465_gpio_set_port);
+EXPORT_SYMBOL(hd64465_gpio_unregister_irq);
+
+/* TODO: each port should be protected with a spinlock */
+
+
+void hd64465_gpio_configure(int portpin, int direction)
+{
+ unsigned short cr;
+ unsigned int shift = (_PINOF(portpin)<<1);
+
+ cr = inw(GPIO_CR(_PORTOF(portpin)));
+ cr &= ~(3<<shift);
+ cr |= direction<<shift;
+ outw(cr, GPIO_CR(_PORTOF(portpin)));
+}
+
+void hd64465_gpio_set_pin(int portpin, unsigned int value)
+{
+ unsigned short d;
+ unsigned short mask = 1<<(_PINOF(portpin));
+
+ d = inw(GPIO_DR(_PORTOF(portpin)));
+ if (value)
+ d |= mask;
+ else
+ d &= ~mask;
+ outw(d, GPIO_DR(_PORTOF(portpin)));
+}
+
+unsigned int hd64465_gpio_get_pin(int portpin)
+{
+ return inw(GPIO_DR(_PORTOF(portpin))) & (1<<(_PINOF(portpin)));
+}
+
+/* TODO: for cleaner atomicity semantics, add a mask to this routine */
+
+void hd64465_gpio_set_port(int port, unsigned int value)
+{
+ outw(value, GPIO_DR(port));
+}
+
+unsigned int hd64465_gpio_get_port(int port)
+{
+ return inw(GPIO_DR(port));
+}
+
+
+static struct {
+ void (*func)(int portpin, void *dev);
+ void *dev;
+} handlers[GPIO_NPORTS * 8];
+
+static irqreturn_t hd64465_gpio_interrupt(int irq, void *dev, struct pt_regs *regs)
+{
+ unsigned short port, pin, isr, mask, portpin;
+
+ for (port=0 ; port<GPIO_NPORTS ; port++) {
+ isr = inw(GPIO_ISR(port));
+
+ for (pin=0 ; pin<8 ; pin++) {
+ mask = 1<<pin;
+ if (isr & mask) {
+ portpin = (port<<3)|pin;
+ if (handlers[portpin].func != 0)
+ handlers[portpin].func(portpin, handlers[portpin].dev);
+ else
+ printk(KERN_NOTICE "unexpected GPIO interrupt, pin %c%d\n",
+ port+'A', (int)pin);
+ }
+ }
+
+ /* Write 1s back to ISR to clear it? That's what the manual says.. */
+ outw(isr, GPIO_ISR(port));
+ }
+
+ return IRQ_HANDLED;
+}
+
+void hd64465_gpio_register_irq(int portpin, int mode,
+ void (*handler)(int portpin, void *dev), void *dev)
+{
+ unsigned long flags;
+ unsigned short icr, mask;
+
+ if (handler == 0)
+ return;
+
+ local_irq_save(flags);
+
+ handlers[portpin].func = handler;
+ handlers[portpin].dev = dev;
+
+ /*
+ * Configure Interrupt Control Register
+ */
+ icr = inw(GPIO_ICR(_PORTOF(portpin)));
+ mask = (1<<_PINOF(portpin));
+
+ /* unmask interrupt */
+ icr &= ~mask;
+
+ /* set TS bit */
+ mask <<= 8;
+ icr &= ~mask;
+ if (mode == HD64465_GPIO_RISING)
+ icr |= mask;
+
+ outw(icr, GPIO_ICR(_PORTOF(portpin)));
+
+ local_irq_restore(flags);
+}
+
+void hd64465_gpio_unregister_irq(int portpin)
+{
+ unsigned long flags;
+ unsigned short icr;
+
+ local_irq_save(flags);
+
+ /*
+ * Configure Interrupt Control Register
+ */
+ icr = inw(GPIO_ICR(_PORTOF(portpin)));
+ icr |= (1<<_PINOF(portpin)); /* mask interrupt */
+ outw(icr, GPIO_ICR(_PORTOF(portpin)));
+
+ handlers[portpin].func = 0;
+ handlers[portpin].dev = 0;
+
+ local_irq_restore(flags);
+}
+
+static int __init hd64465_gpio_init(void)
+{
+ if (!request_region(HD64465_REG_GPACR, 0x1000, MODNAME))
+ return -EBUSY;
+ if (request_irq(HD64465_IRQ_GPIO, hd64465_gpio_interrupt,
+ SA_INTERRUPT, MODNAME, 0))
+ goto out_irqfailed;
+
+ printk("HD64465 GPIO layer on irq %d\n", HD64465_IRQ_GPIO);
+
+ return 0;
+
+out_irqfailed:
+ release_region(HD64465_REG_GPACR, 0x1000);
+
+ return -EINVAL;
+}
+
+static void __exit hd64465_gpio_exit(void)
+{
+ release_region(HD64465_REG_GPACR, 0x1000);
+ free_irq(HD64465_IRQ_GPIO, 0);
+}
+
+module_init(hd64465_gpio_init);
+module_exit(hd64465_gpio_exit);
+
+MODULE_LICENSE("GPL");
+
diff --git a/arch/sh/cchips/hd6446x/hd64465/io.c b/arch/sh/cchips/hd6446x/hd64465/io.c
new file mode 100644
index 000000000000..99ac709c550e
--- /dev/null
+++ b/arch/sh/cchips/hd6446x/hd64465/io.c
@@ -0,0 +1,216 @@
+/*
+ * $Id: io.c,v 1.4 2003/08/03 03:05:10 lethal Exp $
+ * by Greg Banks <gbanks@pocketpenguins.com>
+ * (c) 2000 PocketPenguins Inc
+ *
+ * Derived from io_hd64461.c, which bore the message:
+ * Copyright (C) 2000 YAEGASHI Takeshi
+ *
+ * Typical I/O routines for HD64465 system.
+ */
+
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <asm/io.h>
+#include <asm/hd64465/hd64465.h>
+
+
+#define HD64465_DEBUG 0
+
+#if HD64465_DEBUG
+#define DPRINTK(args...) printk(args)
+#define DIPRINTK(n, args...) if (hd64465_io_debug>(n)) printk(args)
+#else
+#define DPRINTK(args...)
+#define DIPRINTK(n, args...)
+#endif
+
+
+
+/* This is a hack suitable only for debugging IO port problems */
+int hd64465_io_debug;
+EXPORT_SYMBOL(hd64465_io_debug);
+
+/* Low iomap maps port 0-1K to addresses in 8byte chunks */
+#define HD64465_IOMAP_LO_THRESH 0x400
+#define HD64465_IOMAP_LO_SHIFT 3
+#define HD64465_IOMAP_LO_MASK ((1<<HD64465_IOMAP_LO_SHIFT)-1)
+#define HD64465_IOMAP_LO_NMAP (HD64465_IOMAP_LO_THRESH>>HD64465_IOMAP_LO_SHIFT)
+static unsigned long hd64465_iomap_lo[HD64465_IOMAP_LO_NMAP];
+static unsigned char hd64465_iomap_lo_shift[HD64465_IOMAP_LO_NMAP];
+
+/* High iomap maps port 1K-64K to addresses in 1K chunks */
+#define HD64465_IOMAP_HI_THRESH 0x10000
+#define HD64465_IOMAP_HI_SHIFT 10
+#define HD64465_IOMAP_HI_MASK ((1<<HD64465_IOMAP_HI_SHIFT)-1)
+#define HD64465_IOMAP_HI_NMAP (HD64465_IOMAP_HI_THRESH>>HD64465_IOMAP_HI_SHIFT)
+static unsigned long hd64465_iomap_hi[HD64465_IOMAP_HI_NMAP];
+static unsigned char hd64465_iomap_hi_shift[HD64465_IOMAP_HI_NMAP];
+
+#ifndef MAX
+#define MAX(a,b) ((a)>(b)?(a):(b))
+#endif
+
+#define PORT2ADDR(x) (sh_mv.mv_isa_port2addr(x))
+
+void hd64465_port_map(unsigned short baseport, unsigned int nports,
+ unsigned long addr, unsigned char shift)
+{
+ unsigned int port, endport = baseport + nports;
+
+ DPRINTK("hd64465_port_map(base=0x%04hx, n=0x%04hx, addr=0x%08lx,endport=0x%04x)\n",
+ baseport, nports, addr,endport);
+
+ for (port = baseport ;
+ port < endport && port < HD64465_IOMAP_LO_THRESH ;
+ port += (1<<HD64465_IOMAP_LO_SHIFT)) {
+ DPRINTK(" maplo[0x%x] = 0x%08lx\n", port, addr);
+ hd64465_iomap_lo[port>>HD64465_IOMAP_LO_SHIFT] = addr;
+ hd64465_iomap_lo_shift[port>>HD64465_IOMAP_LO_SHIFT] = shift;
+ addr += (1<<(HD64465_IOMAP_LO_SHIFT));
+ }
+
+ for (port = MAX(baseport, HD64465_IOMAP_LO_THRESH) ;
+ port < endport && port < HD64465_IOMAP_HI_THRESH ;
+ port += (1<<HD64465_IOMAP_HI_SHIFT)) {
+ DPRINTK(" maphi[0x%x] = 0x%08lx\n", port, addr);
+ hd64465_iomap_hi[port>>HD64465_IOMAP_HI_SHIFT] = addr;
+ hd64465_iomap_hi_shift[port>>HD64465_IOMAP_HI_SHIFT] = shift;
+ addr += (1<<(HD64465_IOMAP_HI_SHIFT));
+ }
+}
+EXPORT_SYMBOL(hd64465_port_map);
+
+void hd64465_port_unmap(unsigned short baseport, unsigned int nports)
+{
+ unsigned int port, endport = baseport + nports;
+
+ DPRINTK("hd64465_port_unmap(base=0x%04hx, n=0x%04hx)\n",
+ baseport, nports);
+
+ for (port = baseport ;
+ port < endport && port < HD64465_IOMAP_LO_THRESH ;
+ port += (1<<HD64465_IOMAP_LO_SHIFT)) {
+ hd64465_iomap_lo[port>>HD64465_IOMAP_LO_SHIFT] = 0;
+ }
+
+ for (port = MAX(baseport, HD64465_IOMAP_LO_THRESH) ;
+ port < endport && port < HD64465_IOMAP_HI_THRESH ;
+ port += (1<<HD64465_IOMAP_HI_SHIFT)) {
+ hd64465_iomap_hi[port>>HD64465_IOMAP_HI_SHIFT] = 0;
+ }
+}
+EXPORT_SYMBOL(hd64465_port_unmap);
+
+unsigned long hd64465_isa_port2addr(unsigned long port)
+{
+ unsigned long addr = 0;
+ unsigned char shift;
+
+ /* handle remapping of low IO ports */
+ if (port < HD64465_IOMAP_LO_THRESH) {
+ addr = hd64465_iomap_lo[port >> HD64465_IOMAP_LO_SHIFT];
+ shift = hd64465_iomap_lo_shift[port >> HD64465_IOMAP_LO_SHIFT];
+ if (addr != 0)
+ addr += (port & HD64465_IOMAP_LO_MASK) << shift;
+ else
+ printk(KERN_NOTICE "io_hd64465: access to un-mapped port %lx\n", port);
+ } else if (port < HD64465_IOMAP_HI_THRESH) {
+ addr = hd64465_iomap_hi[port >> HD64465_IOMAP_HI_SHIFT];
+ shift = hd64465_iomap_hi_shift[port >> HD64465_IOMAP_HI_SHIFT];
+ if (addr != 0)
+ addr += (port & HD64465_IOMAP_HI_MASK) << shift;
+ else
+ printk(KERN_NOTICE "io_hd64465: access to un-mapped port %lx\n", port);
+ }
+
+ /* HD64465 internal devices (0xb0000000) */
+ else if (port < 0x20000)
+ addr = CONFIG_HD64465_IOBASE + port - 0x10000;
+
+ /* Whole physical address space (0xa0000000) */
+ else
+ addr = P2SEGADDR(port);
+
+ DIPRINTK(2, "PORT2ADDR(0x%08lx) = 0x%08lx\n", port, addr);
+
+ return addr;
+}
+
+static inline void delay(void)
+{
+ ctrl_inw(0xa0000000);
+}
+
+unsigned char hd64465_inb(unsigned long port)
+{
+ unsigned long addr = PORT2ADDR(port);
+ unsigned long b = (addr == 0 ? 0 : *(volatile unsigned char*)addr);
+
+ DIPRINTK(0, "inb(%08lx) = %02x\n", addr, (unsigned)b);
+ return b;
+}
+
+unsigned char hd64465_inb_p(unsigned long port)
+{
+ unsigned long v;
+ unsigned long addr = PORT2ADDR(port);
+
+ v = (addr == 0 ? 0 : *(volatile unsigned char*)addr);
+ delay();
+ DIPRINTK(0, "inb_p(%08lx) = %02x\n", addr, (unsigned)v);
+ return v;
+}
+
+unsigned short hd64465_inw(unsigned long port)
+{
+ unsigned long addr = PORT2ADDR(port);
+ unsigned long b = (addr == 0 ? 0 : *(volatile unsigned short*)addr);
+ DIPRINTK(0, "inw(%08lx) = %04lx\n", addr, b);
+ return b;
+}
+
+unsigned int hd64465_inl(unsigned long port)
+{
+ unsigned long addr = PORT2ADDR(port);
+ unsigned int b = (addr == 0 ? 0 : *(volatile unsigned long*)addr);
+ DIPRINTK(0, "inl(%08lx) = %08x\n", addr, b);
+ return b;
+}
+
+void hd64465_outb(unsigned char b, unsigned long port)
+{
+ unsigned long addr = PORT2ADDR(port);
+
+ DIPRINTK(0, "outb(%02x, %08lx)\n", (unsigned)b, addr);
+ if (addr != 0)
+ *(volatile unsigned char*)addr = b;
+}
+
+void hd64465_outb_p(unsigned char b, unsigned long port)
+{
+ unsigned long addr = PORT2ADDR(port);
+
+ DIPRINTK(0, "outb_p(%02x, %08lx)\n", (unsigned)b, addr);
+ if (addr != 0)
+ *(volatile unsigned char*)addr = b;
+ delay();
+}
+
+void hd64465_outw(unsigned short b, unsigned long port)
+{
+ unsigned long addr = PORT2ADDR(port);
+ DIPRINTK(0, "outw(%04x, %08lx)\n", (unsigned)b, addr);
+ if (addr != 0)
+ *(volatile unsigned short*)addr = b;
+}
+
+void hd64465_outl(unsigned int b, unsigned long port)
+{
+ unsigned long addr = PORT2ADDR(port);
+ DIPRINTK(0, "outl(%08x, %08lx)\n", b, addr);
+ if (addr != 0)
+ *(volatile unsigned long*)addr = b;
+}
+
diff --git a/arch/sh/cchips/hd6446x/hd64465/setup.c b/arch/sh/cchips/hd6446x/hd64465/setup.c
new file mode 100644
index 000000000000..68e4c4e4283d
--- /dev/null
+++ b/arch/sh/cchips/hd6446x/hd64465/setup.c
@@ -0,0 +1,202 @@
+/*
+ * $Id: setup.c,v 1.4 2003/08/03 03:05:10 lethal Exp $
+ *
+ * Setup and IRQ handling code for the HD64465 companion chip.
+ * by Greg Banks <gbanks@pocketpenguins.com>
+ * Copyright (c) 2000 PocketPenguins Inc
+ *
+ * Derived from setup_hd64461.c which bore the message:
+ * Copyright (C) 2000 YAEGASHI Takeshi
+ */
+
+#include <linux/config.h>
+#include <linux/sched.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+
+#include <asm/io.h>
+#include <asm/irq.h>
+
+#include <asm/hd64465/hd64465.h>
+
+static void disable_hd64465_irq(unsigned int irq)
+{
+ unsigned long flags;
+ unsigned short nimr;
+ unsigned short mask = 1 << (irq - HD64465_IRQ_BASE);
+
+ pr_debug("disable_hd64465_irq(%d): mask=%x\n", irq, mask);
+ local_irq_save(flags);
+ nimr = inw(HD64465_REG_NIMR);
+ nimr |= mask;
+ outw(nimr, HD64465_REG_NIMR);
+ local_irq_restore(flags);
+}
+
+
+static void enable_hd64465_irq(unsigned int irq)
+{
+ unsigned long flags;
+ unsigned short nimr;
+ unsigned short mask = 1 << (irq - HD64465_IRQ_BASE);
+
+ pr_debug("enable_hd64465_irq(%d): mask=%x\n", irq, mask);
+ local_irq_save(flags);
+ nimr = inw(HD64465_REG_NIMR);
+ nimr &= ~mask;
+ outw(nimr, HD64465_REG_NIMR);
+ local_irq_restore(flags);
+}
+
+
+static void mask_and_ack_hd64465(unsigned int irq)
+{
+ disable_hd64465_irq(irq);
+}
+
+
+static void end_hd64465_irq(unsigned int irq)
+{
+ if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ enable_hd64465_irq(irq);
+}
+
+
+static unsigned int startup_hd64465_irq(unsigned int irq)
+{
+ enable_hd64465_irq(irq);
+ return 0;
+}
+
+
+static void shutdown_hd64465_irq(unsigned int irq)
+{
+ disable_hd64465_irq(irq);
+}
+
+
+static struct hw_interrupt_type hd64465_irq_type = {
+ .typename = "HD64465-IRQ",
+ .startup = startup_hd64465_irq,
+ .shutdown = shutdown_hd64465_irq,
+ .enable = enable_hd64465_irq,
+ .disable = disable_hd64465_irq,
+ .ack = mask_and_ack_hd64465,
+ .end = end_hd64465_irq,
+};
+
+
+static irqreturn_t hd64465_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+{
+ printk(KERN_INFO
+ "HD64465: spurious interrupt, nirr: 0x%x nimr: 0x%x\n",
+ inw(HD64465_REG_NIRR), inw(HD64465_REG_NIMR));
+
+ return IRQ_NONE;
+}
+
+
+/*====================================================*/
+
+/*
+ * Support for a secondary IRQ demux step. This is necessary
+ * because the HD64465 presents a very thin interface to the
+ * PCMCIA bus; a lot of features (such as remapping interrupts)
+ * normally done in hardware by other PCMCIA host bridges is
+ * instead done in software.
+ */
+static struct
+{
+ int (*func)(int, void *);
+ void *dev;
+} hd64465_demux[HD64465_IRQ_NUM];
+
+void hd64465_register_irq_demux(int irq,
+ int (*demux)(int irq, void *dev), void *dev)
+{
+ hd64465_demux[irq - HD64465_IRQ_BASE].func = demux;
+ hd64465_demux[irq - HD64465_IRQ_BASE].dev = dev;
+}
+EXPORT_SYMBOL(hd64465_register_irq_demux);
+
+void hd64465_unregister_irq_demux(int irq)
+{
+ hd64465_demux[irq - HD64465_IRQ_BASE].func = 0;
+}
+EXPORT_SYMBOL(hd64465_unregister_irq_demux);
+
+
+
+int hd64465_irq_demux(int irq)
+{
+ if (irq == CONFIG_HD64465_IRQ) {
+ unsigned short i, bit;
+ unsigned short nirr = inw(HD64465_REG_NIRR);
+ unsigned short nimr = inw(HD64465_REG_NIMR);
+
+ pr_debug("hd64465_irq_demux, nirr=%04x, nimr=%04x\n", nirr, nimr);
+ nirr &= ~nimr;
+ for (bit = 1, i = 0 ; i < HD64465_IRQ_NUM ; bit <<= 1, i++)
+ if (nirr & bit)
+ break;
+
+ if (i < HD64465_IRQ_NUM) {
+ irq = HD64465_IRQ_BASE + i;
+ if (hd64465_demux[i].func != 0)
+ irq = hd64465_demux[i].func(irq, hd64465_demux[i].dev);
+ }
+ }
+ return irq;
+}
+
+static struct irqaction irq0 = { hd64465_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "HD64465", NULL, NULL};
+
+
+static int __init setup_hd64465(void)
+{
+ int i;
+ unsigned short rev;
+ unsigned short smscr;
+
+ if (!MACH_HD64465)
+ return 0;
+
+ printk(KERN_INFO "HD64465 configured at 0x%x on irq %d(mapped into %d to %d)\n",
+ CONFIG_HD64465_IOBASE,
+ CONFIG_HD64465_IRQ,
+ HD64465_IRQ_BASE,
+ HD64465_IRQ_BASE+HD64465_IRQ_NUM-1);
+
+ if (inw(HD64465_REG_SDID) != HD64465_SDID) {
+ printk(KERN_ERR "HD64465 device ID not found, check base address\n");
+ }
+
+ rev = inw(HD64465_REG_SRR);
+ printk(KERN_INFO "HD64465 hardware revision %d.%d\n", (rev >> 8) & 0xff, rev & 0xff);
+
+ outw(0xffff, HD64465_REG_NIMR); /* mask all interrupts */
+
+ for (i = 0; i < HD64465_IRQ_NUM ; i++) {
+ irq_desc[HD64465_IRQ_BASE + i].handler = &hd64465_irq_type;
+ }
+
+ setup_irq(CONFIG_HD64465_IRQ, &irq0);
+
+#ifdef CONFIG_SERIAL
+ /* wake up the UART from STANDBY at this point */
+ smscr = inw(HD64465_REG_SMSCR);
+ outw(smscr & (~HD64465_SMSCR_UARTST), HD64465_REG_SMSCR);
+
+ /* remap IO ports for first ISA serial port to HD64465 UART */
+ hd64465_port_map(0x3f8, 8, CONFIG_HD64465_IOBASE + 0x8000, 1);
+#endif
+
+ return 0;
+}
+
+module_init(setup_hd64465);
diff --git a/arch/sh/cchips/voyagergx/Makefile b/arch/sh/cchips/voyagergx/Makefile
new file mode 100644
index 000000000000..085de72fd327
--- /dev/null
+++ b/arch/sh/cchips/voyagergx/Makefile
@@ -0,0 +1,8 @@
+#
+# Makefile for VoyagerGX
+#
+
+obj-y := irq.o setup.o
+
+obj-$(CONFIG_USB_OHCI_HCD) += consistent.o
+
diff --git a/arch/sh/cchips/voyagergx/consistent.c b/arch/sh/cchips/voyagergx/consistent.c
new file mode 100644
index 000000000000..5b92585a38d2
--- /dev/null
+++ b/arch/sh/cchips/voyagergx/consistent.c
@@ -0,0 +1,126 @@
+/*
+ * arch/sh/cchips/voyagergx/consistent.c
+ *
+ * Copyright (C) 2004 Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/mm.h>
+#include <linux/dma-mapping.h>
+#include <linux/slab.h>
+#include <linux/list.h>
+#include <linux/types.h>
+#include <linux/module.h>
+#include <linux/device.h>
+#include <asm/io.h>
+#include <asm/bus-sh.h>
+
+struct voya_alloc_entry {
+ struct list_head list;
+ unsigned long ofs;
+ unsigned long len;
+};
+
+static DEFINE_SPINLOCK(voya_list_lock);
+static LIST_HEAD(voya_alloc_list);
+
+#define OHCI_SRAM_START 0xb0000000
+#define OHCI_HCCA_SIZE 0x100
+#define OHCI_SRAM_SIZE 0x10000
+
+void *voyagergx_consistent_alloc(struct device *dev, size_t size,
+ dma_addr_t *handle, int flag)
+{
+ struct list_head *list = &voya_alloc_list;
+ struct voya_alloc_entry *entry;
+ struct sh_dev *shdev = to_sh_dev(dev);
+ unsigned long start, end;
+ unsigned long flags;
+
+ /*
+ * The SM501 contains an integrated 8051 with its own SRAM.
+ * Devices within the cchip can all hook into the 8051 SRAM.
+ * We presently use this for the OHCI.
+ *
+ * Everything else goes through consistent_alloc().
+ */
+ if (!dev || dev->bus != &sh_bus_types[SH_BUS_VIRT] ||
+ (dev->bus == &sh_bus_types[SH_BUS_VIRT] &&
+ shdev->dev_id != SH_DEV_ID_USB_OHCI))
+ return NULL;
+
+ start = OHCI_SRAM_START + OHCI_HCCA_SIZE;
+
+ entry = kmalloc(sizeof(struct voya_alloc_entry), GFP_ATOMIC);
+ if (!entry)
+ return ERR_PTR(-ENOMEM);
+
+ entry->len = (size + 15) & ~15;
+
+ /*
+ * The basis for this allocator is dwmw2's malloc.. the
+ * Matrox allocator :-)
+ */
+ spin_lock_irqsave(&voya_list_lock, flags);
+ list_for_each(list, &voya_alloc_list) {
+ struct voya_alloc_entry *p;
+
+ p = list_entry(list, struct voya_alloc_entry, list);
+
+ if (p->ofs - start >= size)
+ goto out;
+
+ start = p->ofs + p->len;
+ }
+
+ end = start + (OHCI_SRAM_SIZE - OHCI_HCCA_SIZE);
+ list = &voya_alloc_list;
+
+ if (end - start >= size) {
+out:
+ entry->ofs = start;
+ list_add_tail(&entry->list, list);
+ spin_unlock_irqrestore(&voya_list_lock, flags);
+
+ *handle = start;
+ return (void *)start;
+ }
+
+ kfree(entry);
+ spin_unlock_irqrestore(&voya_list_lock, flags);
+
+ return ERR_PTR(-EINVAL);
+}
+
+int voyagergx_consistent_free(struct device *dev, size_t size,
+ void *vaddr, dma_addr_t handle)
+{
+ struct voya_alloc_entry *entry;
+ struct sh_dev *shdev = to_sh_dev(dev);
+ unsigned long flags;
+
+ if (!dev || dev->bus != &sh_bus_types[SH_BUS_VIRT] ||
+ (dev->bus == &sh_bus_types[SH_BUS_VIRT] &&
+ shdev->dev_id != SH_DEV_ID_USB_OHCI))
+ return -EINVAL;
+
+ spin_lock_irqsave(&voya_list_lock, flags);
+ list_for_each_entry(entry, &voya_alloc_list, list) {
+ if (entry->ofs != handle)
+ continue;
+
+ list_del(&entry->list);
+ kfree(entry);
+
+ break;
+ }
+ spin_unlock_irqrestore(&voya_list_lock, flags);
+
+ return 0;
+}
+
+EXPORT_SYMBOL(voyagergx_consistent_alloc);
+EXPORT_SYMBOL(voyagergx_consistent_free);
+
diff --git a/arch/sh/cchips/voyagergx/irq.c b/arch/sh/cchips/voyagergx/irq.c
new file mode 100644
index 000000000000..3079234cb65b
--- /dev/null
+++ b/arch/sh/cchips/voyagergx/irq.c
@@ -0,0 +1,194 @@
+/* -------------------------------------------------------------------- */
+/* setup_voyagergx.c: */
+/* -------------------------------------------------------------------- */
+/* This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+ Copyright 2003 (c) Lineo uSolutions,Inc.
+*/
+/* -------------------------------------------------------------------- */
+
+#undef DEBUG
+
+#include <linux/config.h>
+#include <linux/sched.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/rts7751r2d/rts7751r2d.h>
+#include <asm/rts7751r2d/voyagergx_reg.h>
+
+static void disable_voyagergx_irq(unsigned int irq)
+{
+ unsigned long flags, val;
+ unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE);
+
+ pr_debug("disable_voyagergx_irq(%d): mask=%x\n", irq, mask);
+ local_irq_save(flags);
+ val = inl(VOYAGER_INT_MASK);
+ val &= ~mask;
+ outl(val, VOYAGER_INT_MASK);
+ local_irq_restore(flags);
+}
+
+
+static void enable_voyagergx_irq(unsigned int irq)
+{
+ unsigned long flags, val;
+ unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE);
+
+ pr_debug("disable_voyagergx_irq(%d): mask=%x\n", irq, mask);
+ local_irq_save(flags);
+ val = inl(VOYAGER_INT_MASK);
+ val |= mask;
+ outl(val, VOYAGER_INT_MASK);
+ local_irq_restore(flags);
+}
+
+
+static void mask_and_ack_voyagergx(unsigned int irq)
+{
+ disable_voyagergx_irq(irq);
+}
+
+static void end_voyagergx_irq(unsigned int irq)
+{
+ if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ enable_voyagergx_irq(irq);
+}
+
+static unsigned int startup_voyagergx_irq(unsigned int irq)
+{
+ enable_voyagergx_irq(irq);
+ return 0;
+}
+
+static void shutdown_voyagergx_irq(unsigned int irq)
+{
+ disable_voyagergx_irq(irq);
+}
+
+static struct hw_interrupt_type voyagergx_irq_type = {
+ "VOYAGERGX-IRQ",
+ startup_voyagergx_irq,
+ shutdown_voyagergx_irq,
+ enable_voyagergx_irq,
+ disable_voyagergx_irq,
+ mask_and_ack_voyagergx,
+ end_voyagergx_irq,
+};
+
+static irqreturn_t voyagergx_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+{
+ printk(KERN_INFO
+ "VoyagerGX: spurious interrupt, status: 0x%x\n",
+ inl(INT_STATUS));
+ return IRQ_HANDLED;
+}
+
+
+/*====================================================*/
+
+static struct {
+ int (*func)(int, void *);
+ void *dev;
+} voyagergx_demux[VOYAGER_IRQ_NUM];
+
+void voyagergx_register_irq_demux(int irq,
+ int (*demux)(int irq, void *dev), void *dev)
+{
+ voyagergx_demux[irq - VOYAGER_IRQ_BASE].func = demux;
+ voyagergx_demux[irq - VOYAGER_IRQ_BASE].dev = dev;
+}
+
+void voyagergx_unregister_irq_demux(int irq)
+{
+ voyagergx_demux[irq - VOYAGER_IRQ_BASE].func = 0;
+}
+
+int voyagergx_irq_demux(int irq)
+{
+
+ if (irq == IRQ_VOYAGER ) {
+ unsigned long i = 0, bit __attribute__ ((unused));
+ unsigned long val = inl(INT_STATUS);
+#if 1
+ if ( val & ( 1 << 1 )){
+ i = 1;
+ } else if ( val & ( 1 << 2 )){
+ i = 2;
+ } else if ( val & ( 1 << 6 )){
+ i = 6;
+ } else if( val & ( 1 << 10 )){
+ i = 10;
+ } else if( val & ( 1 << 11 )){
+ i = 11;
+ } else if( val & ( 1 << 12 )){
+ i = 12;
+ } else if( val & ( 1 << 17 )){
+ i = 17;
+ } else {
+ printk("Unexpected IRQ irq = %d status = 0x%08lx\n", irq, val);
+ }
+ pr_debug("voyagergx_irq_demux %d \n", i);
+#else
+ for (bit = 1, i = 0 ; i < VOYAGER_IRQ_NUM ; bit <<= 1, i++)
+ if (val & bit)
+ break;
+#endif
+ if (i < VOYAGER_IRQ_NUM) {
+ irq = VOYAGER_IRQ_BASE + i;
+ if (voyagergx_demux[i].func != 0)
+ irq = voyagergx_demux[i].func(irq, voyagergx_demux[i].dev);
+ }
+ }
+ return irq;
+}
+
+static struct irqaction irq0 = { voyagergx_interrupt, SA_INTERRUPT, 0, "VOYAGERGX", NULL, NULL};
+
+void __init setup_voyagergx_irq(void)
+{
+ int i, flag;
+
+ printk(KERN_INFO "VoyagerGX configured at 0x%x on irq %d(mapped into %d to %d)\n",
+ VOYAGER_BASE,
+ IRQ_VOYAGER,
+ VOYAGER_IRQ_BASE,
+ VOYAGER_IRQ_BASE + VOYAGER_IRQ_NUM - 1);
+
+ for (i=0; i<VOYAGER_IRQ_NUM; i++) {
+ flag = 0;
+ switch (VOYAGER_IRQ_BASE + i) {
+ case VOYAGER_USBH_IRQ:
+ case VOYAGER_8051_IRQ:
+ case VOYAGER_UART0_IRQ:
+ case VOYAGER_UART1_IRQ:
+ case VOYAGER_AC97_IRQ:
+ flag = 1;
+ }
+ if (flag == 1)
+ irq_desc[VOYAGER_IRQ_BASE + i].handler = &voyagergx_irq_type;
+ }
+
+ setup_irq(IRQ_VOYAGER, &irq0);
+}
+
diff --git a/arch/sh/cchips/voyagergx/setup.c b/arch/sh/cchips/voyagergx/setup.c
new file mode 100644
index 000000000000..139ca88ac9e6
--- /dev/null
+++ b/arch/sh/cchips/voyagergx/setup.c
@@ -0,0 +1,37 @@
+/*
+ * arch/sh/cchips/voyagergx/setup.c
+ *
+ * Setup routines for VoyagerGX cchip.
+ *
+ * Copyright (C) 2003 Lineo uSolutions, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+#include <linux/init.h>
+#include <linux/module.h>
+#include <asm/io.h>
+#include <asm/rts7751r2d/voyagergx_reg.h>
+
+static int __init setup_voyagergx(void)
+{
+ unsigned long val;
+
+ val = inl(DRAM_CTRL);
+ val |= (DRAM_CTRL_CPU_COLUMN_SIZE_256 |
+ DRAM_CTRL_CPU_ACTIVE_PRECHARGE |
+ DRAM_CTRL_CPU_RESET |
+ DRAM_CTRL_REFRESH_COMMAND |
+ DRAM_CTRL_BLOCK_WRITE_TIME |
+ DRAM_CTRL_BLOCK_WRITE_PRECHARGE |
+ DRAM_CTRL_ACTIVE_PRECHARGE |
+ DRAM_CTRL_RESET |
+ DRAM_CTRL_REMAIN_ACTIVE);
+ outl(val, DRAM_CTRL);
+
+ return 0;
+}
+
+module_init(setup_voyagergx);