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-rw-r--r--arch/mips/vr4181/osprey/Makefile7
-rw-r--r--arch/mips/vr4181/osprey/dbg_io.c136
-rw-r--r--arch/mips/vr4181/osprey/prom.c49
-rw-r--r--arch/mips/vr4181/osprey/reset.c40
-rw-r--r--arch/mips/vr4181/osprey/setup.c68
5 files changed, 300 insertions, 0 deletions
diff --git a/arch/mips/vr4181/osprey/Makefile b/arch/mips/vr4181/osprey/Makefile
new file mode 100644
index 000000000000..34be05790883
--- /dev/null
+++ b/arch/mips/vr4181/osprey/Makefile
@@ -0,0 +1,7 @@
+#
+# Makefile for common code of NEC Osprey board
+#
+
+obj-y := setup.o prom.o reset.o
+
+obj-$(CONFIG_KGDB) += dbg_io.o
diff --git a/arch/mips/vr4181/osprey/dbg_io.c b/arch/mips/vr4181/osprey/dbg_io.c
new file mode 100644
index 000000000000..5e8a84072d5b
--- /dev/null
+++ b/arch/mips/vr4181/osprey/dbg_io.c
@@ -0,0 +1,136 @@
+/*
+ * kgdb io functions for osprey. We use the serial port on debug board.
+ *
+ * Copyright (C) 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+
+/* ======================= CONFIG ======================== */
+
+/* [jsun] we use the second serial port for kdb */
+#define BASE 0xb7fffff0
+#define MAX_BAUD 115200
+
+/* distance in bytes between two serial registers */
+#define REG_OFFSET 1
+
+/*
+ * 0 - kgdb does serial init
+ * 1 - kgdb skip serial init
+ */
+static int remoteDebugInitialized = 1;
+
+/*
+ * the default baud rate *if* kgdb does serial init
+ */
+#define BAUD_DEFAULT UART16550_BAUD_38400
+
+/* ======================= END OF CONFIG ======================== */
+
+typedef unsigned char uint8;
+typedef unsigned int uint32;
+
+#define UART16550_BAUD_2400 2400
+#define UART16550_BAUD_4800 4800
+#define UART16550_BAUD_9600 9600
+#define UART16550_BAUD_19200 19200
+#define UART16550_BAUD_38400 38400
+#define UART16550_BAUD_57600 57600
+#define UART16550_BAUD_115200 115200
+
+#define UART16550_PARITY_NONE 0
+#define UART16550_PARITY_ODD 0x08
+#define UART16550_PARITY_EVEN 0x18
+#define UART16550_PARITY_MARK 0x28
+#define UART16550_PARITY_SPACE 0x38
+
+#define UART16550_DATA_5BIT 0x0
+#define UART16550_DATA_6BIT 0x1
+#define UART16550_DATA_7BIT 0x2
+#define UART16550_DATA_8BIT 0x3
+
+#define UART16550_STOP_1BIT 0x0
+#define UART16550_STOP_2BIT 0x4
+
+/* register offset */
+#define OFS_RCV_BUFFER 0
+#define OFS_TRANS_HOLD 0
+#define OFS_SEND_BUFFER 0
+#define OFS_INTR_ENABLE (1*REG_OFFSET)
+#define OFS_INTR_ID (2*REG_OFFSET)
+#define OFS_DATA_FORMAT (3*REG_OFFSET)
+#define OFS_LINE_CONTROL (3*REG_OFFSET)
+#define OFS_MODEM_CONTROL (4*REG_OFFSET)
+#define OFS_RS232_OUTPUT (4*REG_OFFSET)
+#define OFS_LINE_STATUS (5*REG_OFFSET)
+#define OFS_MODEM_STATUS (6*REG_OFFSET)
+#define OFS_RS232_INPUT (6*REG_OFFSET)
+#define OFS_SCRATCH_PAD (7*REG_OFFSET)
+
+#define OFS_DIVISOR_LSB (0*REG_OFFSET)
+#define OFS_DIVISOR_MSB (1*REG_OFFSET)
+
+
+/* memory-mapped read/write of the port */
+#define UART16550_READ(y) (*((volatile uint8*)(BASE + y)))
+#define UART16550_WRITE(y, z) ((*((volatile uint8*)(BASE + y))) = z)
+
+void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
+{
+ /* disable interrupts */
+ UART16550_WRITE(OFS_INTR_ENABLE, 0);
+
+ /* set up buad rate */
+ {
+ uint32 divisor;
+
+ /* set DIAB bit */
+ UART16550_WRITE(OFS_LINE_CONTROL, 0x80);
+
+ /* set divisor */
+ divisor = MAX_BAUD / baud;
+ UART16550_WRITE(OFS_DIVISOR_LSB, divisor & 0xff);
+ UART16550_WRITE(OFS_DIVISOR_MSB, (divisor & 0xff00) >> 8);
+
+ /* clear DIAB bit */
+ UART16550_WRITE(OFS_LINE_CONTROL, 0x0);
+ }
+
+ /* set data format */
+ UART16550_WRITE(OFS_DATA_FORMAT, data | parity | stop);
+}
+
+
+uint8 getDebugChar(void)
+{
+ if (!remoteDebugInitialized) {
+ remoteDebugInitialized = 1;
+ debugInit(BAUD_DEFAULT,
+ UART16550_DATA_8BIT,
+ UART16550_PARITY_NONE, UART16550_STOP_1BIT);
+ }
+
+ while ((UART16550_READ(OFS_LINE_STATUS) & 0x1) == 0);
+ return UART16550_READ(OFS_RCV_BUFFER);
+}
+
+
+int putDebugChar(uint8 byte)
+{
+ if (!remoteDebugInitialized) {
+ remoteDebugInitialized = 1;
+ debugInit(BAUD_DEFAULT,
+ UART16550_DATA_8BIT,
+ UART16550_PARITY_NONE, UART16550_STOP_1BIT);
+ }
+
+ while ((UART16550_READ(OFS_LINE_STATUS) & 0x20) == 0);
+ UART16550_WRITE(OFS_SEND_BUFFER, byte);
+ return 1;
+}
diff --git a/arch/mips/vr4181/osprey/prom.c b/arch/mips/vr4181/osprey/prom.c
new file mode 100644
index 000000000000..af0d14561619
--- /dev/null
+++ b/arch/mips/vr4181/osprey/prom.c
@@ -0,0 +1,49 @@
+/*
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * arch/mips/vr4181/osprey/prom.c
+ * prom code for osprey.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/bootmem.h>
+#include <asm/bootinfo.h>
+#include <asm/addrspace.h>
+
+const char *get_system_type(void)
+{
+ return "NEC_Vr41xx Osprey";
+}
+
+/*
+ * [jsun] right now we assume it is the nec debug monitor, which does
+ * not pass any arguments.
+ */
+void __init prom_init(void)
+{
+ // cmdline is now set in default config
+ // strcpy(arcs_cmdline, "ip=bootp ");
+ // strcat(arcs_cmdline, "ether=46,0x03fe0300,eth0 ");
+ // strcpy(arcs_cmdline, "ether=0,0x0300,eth0 "
+ // strcat(arcs_cmdline, "video=vr4181fb:xres:240,yres:320,bpp:8 ");
+
+ mips_machgroup = MACH_GROUP_NEC_VR41XX;
+ mips_machtype = MACH_NEC_OSPREY;
+
+ /* 16MB fixed */
+ add_memory_region(0, 16 << 20, BOOT_MEM_RAM);
+}
+
+unsigned long __init prom_free_prom_memory(void)
+{
+ return 0;
+}
diff --git a/arch/mips/vr4181/osprey/reset.c b/arch/mips/vr4181/osprey/reset.c
new file mode 100644
index 000000000000..036ae83d89d6
--- /dev/null
+++ b/arch/mips/vr4181/osprey/reset.c
@@ -0,0 +1,40 @@
+/*
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * Copyright (C) 1997, 2001 Ralf Baechle
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ */
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <asm/io.h>
+#include <asm/cacheflush.h>
+#include <asm/processor.h>
+#include <asm/reboot.h>
+#include <asm/system.h>
+
+void nec_osprey_restart(char *command)
+{
+ set_c0_status(ST0_ERL);
+ change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
+ flush_cache_all();
+ write_c0_wired(0);
+ __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
+}
+
+void nec_osprey_halt(void)
+{
+ printk(KERN_NOTICE "\n** You can safely turn off the power\n");
+ while (1)
+ __asm__(".set\tmips3\n\t"
+ "wait\n\t"
+ ".set\tmips0");
+}
+
+void nec_osprey_power_off(void)
+{
+ nec_osprey_halt();
+}
diff --git a/arch/mips/vr4181/osprey/setup.c b/arch/mips/vr4181/osprey/setup.c
new file mode 100644
index 000000000000..2ff7140e7ed7
--- /dev/null
+++ b/arch/mips/vr4181/osprey/setup.c
@@ -0,0 +1,68 @@
+/*
+ * linux/arch/mips/vr4181/setup.c
+ *
+ * VR41xx setup routines
+ *
+ * Copyright (C) 1999 Bradley D. LaRonde
+ * Copyright (C) 1999, 2000 Michael Klar
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ */
+
+#include <linux/ide.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <asm/reboot.h>
+#include <asm/vr4181/vr4181.h>
+#include <asm/io.h>
+
+
+extern void nec_osprey_restart(char* c);
+extern void nec_osprey_halt(void);
+extern void nec_osprey_power_off(void);
+
+extern void vr4181_init_serial(void);
+extern void vr4181_init_time(void);
+
+static void __init nec_osprey_setup(void)
+{
+ set_io_port_base(VR4181_PORT_BASE);
+ isa_slot_offset = VR4181_ISAMEM_BASE;
+
+ vr4181_init_serial();
+ vr4181_init_time();
+
+ _machine_restart = nec_osprey_restart;
+ _machine_halt = nec_osprey_halt;
+ _machine_power_off = nec_osprey_power_off;
+
+ /* setup resource limit */
+ ioport_resource.end = 0xffffffff;
+ iomem_resource.end = 0xffffffff;
+
+ /* [jsun] hack */
+ /*
+ printk("[jsun] hack to change external ISA control register, %x -> %x\n",
+ (*VR4181_XISACTL),
+ (*VR4181_XISACTL) | 0x2);
+ *VR4181_XISACTL |= 0x2;
+ */
+
+ // *VR4181_GPHIBSTH = 0x2000;
+ // *VR4181_GPMD0REG = 0x00c0;
+ // *VR4181_GPINTEN = 1<<6;
+
+ /* [jsun] I believe this will get the interrupt type right
+ * for the ether port.
+ */
+ *VR4181_GPINTTYPL = 0x3000;
+}
+
+early_initcall(nec_osprey_setup);