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-rw-r--r--include/linux/irq.h2
-rw-r--r--kernel/irq/generic-chip.c17
2 files changed, 12 insertions, 7 deletions
diff --git a/include/linux/irq.h b/include/linux/irq.h
index 38709a3ab1c0..7f1f0157fd00 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -704,10 +704,12 @@ struct irq_chip_generic {
* @IRQ_GC_INIT_NESTED_LOCK: Set the lock class of the irqs to nested for
* irq chips which need to call irq_set_wake() on
* the parent irq. Usually GPIO implementations
+ * @IRQ_GC_MASK_CACHE_PER_TYPE: Mask cache is chip type private
*/
enum irq_gc_flags {
IRQ_GC_INIT_MASK_CACHE = 1 << 0,
IRQ_GC_INIT_NESTED_LOCK = 1 << 1,
+ IRQ_GC_MASK_CACHE_PER_TYPE = 1 << 2,
};
/* Generic chip callback functions */
diff --git a/kernel/irq/generic-chip.c b/kernel/irq/generic-chip.c
index 113d9ebfe0aa..da2a94191fc5 100644
--- a/kernel/irq/generic-chip.c
+++ b/kernel/irq/generic-chip.c
@@ -241,18 +241,21 @@ void irq_setup_generic_chip(struct irq_chip_generic *gc, u32 msk,
{
struct irq_chip_type *ct = gc->chip_types;
unsigned int i;
+ u32 *mskptr = &gc->mask_cache, mskreg = ct->regs.mask;
raw_spin_lock(&gc_lock);
list_add_tail(&gc->list, &gc_list);
raw_spin_unlock(&gc_lock);
- /* Init mask cache ? */
- if (flags & IRQ_GC_INIT_MASK_CACHE)
- gc->mask_cache = irq_reg_readl(gc->reg_base + ct->regs.mask);
-
- /* Initialize mask cache pointer */
- for (i = 0; i < gc->num_ct; i++)
- ct[i].mask_cache = &gc->mask_cache;
+ for (i = 0; i < gc->num_ct; i++) {
+ if (flags & IRQ_GC_MASK_CACHE_PER_TYPE) {
+ mskptr = &ct[i].mask_cache_priv;
+ mskreg = ct[i].regs.mask;
+ }
+ ct[i].mask_cache = mskptr;
+ if (flags & IRQ_GC_INIT_MASK_CACHE)
+ *mskptr = irq_reg_readl(gc->reg_base + mskreg);
+ }
for (i = gc->irq_base; msk; msk >>= 1, i++) {
if (!(msk & 0x01))