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authorLinus Walleij <linus.walleij@linaro.org>2015-05-14 11:22:34 +0200
committerArnd Bergmann <arnd@arndb.de>2015-05-15 17:22:39 +0200
commit487934109d33e1749d3034899685111bca6ffd0b (patch)
tree73dabc468bbc83480b1824c833859f39815cb77c /arch
parentbc2ad8ffd834eb9ba71e965907257998b8fea339 (diff)
downloadlinux-stericsson-487934109d33e1749d3034899685111bca6ffd0b.tar.gz
ARM: ux500: add SCU and WD to device tree
The Ux500 like other Cortex-A9 SoC's has a Snoop Control Unit (SCU) and a Watchdog in the same address range as the local timers. Add these to the SoC device tree. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/ste-dbx5x0.dtsi12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi
index 5b876f263af4..f024a1c0de8b 100644
--- a/arch/arm/boot/dts/ste-dbx5x0.dtsi
+++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi
@@ -185,6 +185,11 @@
<0xa0410100 0x100>;
};
+ scu@a04100000 {
+ compatible = "arm,cortex-a9-scu";
+ reg = <0xa0410000 0x100>;
+ };
+
L2: l2-cache {
compatible = "arm,pl310-cache";
reg = <0xa0412000 0x1000>;
@@ -245,6 +250,13 @@
clocks = <&smp_twd_clk>;
};
+ watchdog@a0410620 {
+ compatible = "arm,cortex-a9-twd-wdt";
+ reg = <0xa0410620 0x20>;
+ interrupts = <1 14 0x304>;
+ clocks = <&smp_twd_clk>;
+ };
+
rtc@80154000 {
compatible = "arm,rtc-pl031", "arm,primecell";
reg = <0x80154000 0x1000>;