|author||Dave Hansen <firstname.lastname@example.org>||2015-12-14 11:06:34 -0800|
|committer||Ingo Molnar <email@example.com>||2016-03-29 11:21:17 +0200|
x86/mm/pkeys: Add missing Documentation
Stefan Richter noticed that the X86_INTEL_MEMORY_PROTECTION_KEYS option in arch/x86/Kconfig references Documentation/x86/protection-keys.txt, but the file does not exist. This is a patch merging mishap: the final (v8) version of the pkeys series did not include the documentation patch 32 and v7 included. Add it now. Reported-by: Stefan Richter <firstname.lastname@example.org> Signed-off-by: Dave Hansen <email@example.com> Cc: Andy Lutomirski <firstname.lastname@example.org> Cc: Borislav Petkov <email@example.com> Cc: Brian Gerst <firstname.lastname@example.org> Cc: Dave Hansen <email@example.com> Cc: Denys Vlasenko <firstname.lastname@example.org> Cc: H. Peter Anvin <email@example.com> Cc: Linus Torvalds <firstname.lastname@example.org> Cc: Peter Zijlstra <email@example.com> Cc: Thomas Gleixner <firstname.lastname@example.org> Cc: email@example.com Link: http://lkml.kernel.org/r/20151214190634.426BEE41@viggo.jf.intel.com [ Added changelog. ] Signed-off-by: Ingo Molnar <firstname.lastname@example.org> Signed-off-by: Ingo Molnar <email@example.com>
Diffstat (limited to 'Documentation')
1 files changed, 27 insertions, 0 deletions
diff --git a/Documentation/x86/protection-keys.txt b/Documentation/x86/protection-keys.txt
new file mode 100644
@@ -0,0 +1,27 @@
+Memory Protection Keys for Userspace (PKU aka PKEYs) is a CPU feature
+which will be found on future Intel CPUs.
+Memory Protection Keys provides a mechanism for enforcing page-based
+protections, but without requiring modification of the page tables
+when an application changes protection domains. It works by
+dedicating 4 previously ignored bits in each page table entry to a
+"protection key", giving 16 possible keys.
+There is also a new user-accessible register (PKRU) with two separate
+bits (Access Disable and Write Disable) for each key. Being a CPU
+register, PKRU is inherently thread-local, potentially giving each
+thread a different set of protections from every other thread.
+There are two new instructions (RDPKRU/WRPKRU) for reading and writing
+to the new register. The feature is only available in 64-bit mode,
+even though there is theoretically space in the PAE PTEs. These
+permissions are enforced on data access only and have no effect on
+=========================== Config Option ===========================
+This config option adds approximately 1.5kb of text. and 50 bytes of
+data to the executable. A workload which does large O_DIRECT reads
+of holes in XFS files was run to exercise get_user_pages_fast(). No
+performance delta was observed with the config option
+enabled or disabled.