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authorFu Wei <fu.wei@linaro.org>2016-05-24 21:30:28 +0800
committerGraeme Gregory <graeme.gregory@linaro.org>2016-06-07 14:04:05 +0100
commit33ce65399f5bf1db78d4399c42e1634a2f6e1899 (patch)
tree6a3d10b8de107c47f32f6dbd94eb288e92756643
parentaf8c34ce6ae32addda3788d54a7e340cad22516b (diff)
downloadleg-kernel-33ce65399f5bf1db78d4399c42e1634a2f6e1899.tar.gz
clocksource/drivers/arm_arch_timer: Move enums and defines to header file
To support the arm_arch_timer via ACPI we need to share defines and enums between the driver and the ACPI parser code. Split out the relevant defines and enums into arm_arch_timer.h. No functional change. Signed-off-by: Fu Wei <fu.wei@linaro.org>
-rw-r--r--drivers/clocksource/arm_arch_timer.c11
-rw-r--r--include/clocksource/arm_arch_timer.h11
2 files changed, 11 insertions, 11 deletions
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index 4814446a0024..5d7272e9c104 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -48,8 +48,6 @@
#define CNTV_TVAL 0x38
#define CNTV_CTL 0x3c
-#define ARCH_CP15_TIMER BIT(0)
-#define ARCH_MEM_TIMER BIT(1)
static unsigned arch_timers_present __initdata;
static void __iomem *arch_counter_base;
@@ -62,15 +60,6 @@ struct arch_timer {
#define to_arch_timer(e) container_of(e, struct arch_timer, evt)
static u32 arch_timer_rate;
-
-enum ppi_nr {
- PHYS_SECURE_PPI,
- PHYS_NONSECURE_PPI,
- VIRT_PPI,
- HYP_PPI,
- MAX_TIMER_PPI
-};
-
static int arch_timer_ppi[MAX_TIMER_PPI];
static struct clock_event_device __percpu *arch_timer_evt;
diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h
index caedb74c9210..6f06481fee96 100644
--- a/include/clocksource/arm_arch_timer.h
+++ b/include/clocksource/arm_arch_timer.h
@@ -19,6 +19,9 @@
#include <linux/timecounter.h>
#include <linux/types.h>
+#define ARCH_CP15_TIMER BIT(0)
+#define ARCH_MEM_TIMER BIT(1)
+
#define ARCH_TIMER_CTRL_ENABLE (1 << 0)
#define ARCH_TIMER_CTRL_IT_MASK (1 << 1)
#define ARCH_TIMER_CTRL_IT_STAT (1 << 2)
@@ -34,6 +37,14 @@ enum arch_timer_reg {
ARCH_TIMER_REG_TVAL,
};
+enum ppi_nr {
+ PHYS_SECURE_PPI,
+ PHYS_NONSECURE_PPI,
+ VIRT_PPI,
+ HYP_PPI,
+ MAX_TIMER_PPI
+};
+
#define ARCH_TIMER_PHYS_ACCESS 0
#define ARCH_TIMER_VIRT_ACCESS 1
#define ARCH_TIMER_MEM_PHYS_ACCESS 2