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authorHanjun Guo <hanjun.guo@linaro.org>2014-01-17 20:25:05 +0800
committerGraeme Gregory <graeme.gregory@linaro.org>2014-06-03 09:24:05 +0100
commit5cc94861165c2fb43c662d9ca7467117b227d8fc (patch)
tree7015cb5434ef9c796dd5c7af4d1c08caa1f46c58
parentb8c1643e63cdd16a3d34bba0e00db8d43945bb7c (diff)
downloadleg-kernel-5cc94861165c2fb43c662d9ca7467117b227d8fc.tar.gz
ARM64 / ACPI: Get the enable method for SMP initialization
ACPI has no flag to indicate different enable methods for SMP initialization, but it indicates that spin-table is supported at now because of the Parked Protocol shows that there is parked address in GIC structure. In order to boot the system with ACPI if DT is not available, we set the default enable method as spin-table since PSCI is not available in ACPI spec at now. Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
-rw-r--r--arch/arm64/include/asm/acpi.h8
-rw-r--r--arch/arm64/include/asm/cpu_ops.h1
-rw-r--r--arch/arm64/include/asm/smp.h2
-rw-r--r--arch/arm64/kernel/cpu_ops.c2
-rw-r--r--arch/arm64/kernel/smp.c42
-rw-r--r--drivers/acpi/plat/arm-core.c26
6 files changed, 77 insertions, 4 deletions
diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h
index 7edd39e505ee..097394c6f8dc 100644
--- a/arch/arm64/include/asm/acpi.h
+++ b/arch/arm64/include/asm/acpi.h
@@ -87,11 +87,19 @@ extern int (*acpi_suspend_lowlevel)(void);
extern int arm_cpu_to_apicid[NR_CPUS];
#define cpu_physical_id(cpu) arm_cpu_to_apicid[cpu]
+extern const char *acpi_get_enable_method(int cpu);
+
#else /* !CONFIG_ACPI */
#define acpi_disabled 1 /* ACPI sometimes enabled on ARM */
#define acpi_noirq 1 /* ACPI sometimes enabled on ARM */
#define acpi_pci_disabled 1 /* ACPI PCI sometimes enabled on ARM */
#define acpi_strict 1 /* no ACPI spec workarounds on ARM */
+
+static inline const char *acpi_get_enable_method(int cpu)
+{
+ return NULL;
+}
+
#endif
#endif /*_ASM_ARM64_ACPI_H*/
diff --git a/arch/arm64/include/asm/cpu_ops.h b/arch/arm64/include/asm/cpu_ops.h
index 152413076503..338ea3594a8f 100644
--- a/arch/arm64/include/asm/cpu_ops.h
+++ b/arch/arm64/include/asm/cpu_ops.h
@@ -59,6 +59,7 @@ struct cpu_operations {
};
extern const struct cpu_operations *cpu_ops[NR_CPUS];
+extern const struct cpu_operations * __init cpu_get_ops(const char *name);
extern int __init cpu_read_ops(struct device_node *dn, int cpu);
extern void __init cpu_read_bootcpu_ops(void);
diff --git a/arch/arm64/include/asm/smp.h b/arch/arm64/include/asm/smp.h
index a498f2cd2c2a..a5cea56e4973 100644
--- a/arch/arm64/include/asm/smp.h
+++ b/arch/arm64/include/asm/smp.h
@@ -39,7 +39,7 @@ extern void show_ipi_list(struct seq_file *p, int prec);
extern void handle_IPI(int ipinr, struct pt_regs *regs);
/*
- * Setup the set of possible CPUs (via set_cpu_possible)
+ * Platform specific SMP operations
*/
extern void smp_init_cpus(void);
diff --git a/arch/arm64/kernel/cpu_ops.c b/arch/arm64/kernel/cpu_ops.c
index d62d12fb36c8..531f2cca59b9 100644
--- a/arch/arm64/kernel/cpu_ops.c
+++ b/arch/arm64/kernel/cpu_ops.c
@@ -35,7 +35,7 @@ static const struct cpu_operations *supported_cpu_ops[] __initconst = {
NULL,
};
-static const struct cpu_operations * __init cpu_get_ops(const char *name)
+const struct cpu_operations * __init cpu_get_ops(const char *name)
{
const struct cpu_operations **ops = supported_cpu_ops;
diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index f0a141dd5655..be4694c2ab31 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -48,6 +48,7 @@
#include <asm/sections.h>
#include <asm/tlbflush.h>
#include <asm/ptrace.h>
+#include <asm/acpi.h>
/*
* as from 2.5, kernels no longer have an init_tasks structure
@@ -290,7 +291,7 @@ static void (*smp_cross_call)(const struct cpumask *, unsigned int);
* cpu logical map array containing MPIDR values related to logical
* cpus. Assumes that cpu_logical_map(0) has already been initialized.
*/
-void __init smp_init_cpus(void)
+static int __init of_smp_init_cpus(void)
{
struct device_node *dn = NULL;
unsigned int i, cpu = 1;
@@ -374,6 +375,10 @@ next:
cpu++;
}
+ /* No device tree or no CPU node in DT */
+ if (cpu == 1 && !bootcpu_valid)
+ return -ENODEV;
+
/* sanity check */
if (cpu > NR_CPUS)
pr_warning("no. of cores (%d) greater than configured maximum of %d - clipping\n",
@@ -381,7 +386,7 @@ next:
if (!bootcpu_valid) {
pr_err("DT missing boot CPU MPIDR, not enabling secondaries\n");
- return;
+ return -EINVAL;
}
/*
@@ -391,6 +396,39 @@ next:
for (i = 0; i < NR_CPUS; i++)
if (cpu_logical_map(i) != INVALID_HWID)
set_cpu_possible(i, true);
+
+ return 0;
+}
+
+/*
+ * In ACPI mode, the cpu possible map was enumerated before SMP
+ * initialization when MADT table was parsed, so we can get the
+ * possible map here to initialize CPUs.
+ */
+static void __init acpi_smp_init_cpus(void)
+{
+ int cpu;
+ const char *enable_method;
+
+ for_each_possible_cpu(cpu) {
+ enable_method = acpi_get_enable_method(cpu);
+ if (!enable_method)
+ continue;
+
+ cpu_ops[cpu] = cpu_get_ops(enable_method);
+ if (!cpu_ops[cpu])
+ continue;
+
+ cpu_ops[cpu]->cpu_init(NULL, cpu);
+ }
+}
+
+void __init smp_init_cpus(void)
+{
+ if (!of_smp_init_cpus())
+ return;
+
+ acpi_smp_init_cpus();
}
void __init smp_prepare_cpus(unsigned int max_cpus)
diff --git a/drivers/acpi/plat/arm-core.c b/drivers/acpi/plat/arm-core.c
index 1d9b7898bd93..2704633fd3c7 100644
--- a/drivers/acpi/plat/arm-core.c
+++ b/drivers/acpi/plat/arm-core.c
@@ -367,6 +367,32 @@ static void __init acpi_process_madt(void)
}
/*
+ * To see PCSI is enabled or not.
+ *
+ * PSCI is not available for ACPI 5.0, return FALSE for now.
+ *
+ * FIXME: should we introduce early_param("psci", func) for test purpose?
+ */
+static bool acpi_psci_smp_available(int cpu)
+{
+ return FALSE;
+}
+
+static const char *enable_method[] = {
+ "psci",
+ "spin-table",
+ NULL
+};
+
+const char *acpi_get_enable_method(int cpu)
+{
+ if (acpi_psci_smp_available(cpu))
+ return enable_method[0];
+ else
+ return enable_method[1];
+}
+
+/*
* acpi_boot_table_init() and acpi_boot_init()
* called from setup_arch(), always.
* 1. checksums all tables