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2014-01-20Build system: minor spacing tidyupRyan Harkin
Tidy up the spacing of variable definitions within the makefiles to make them more consistent, easier to read and amend. Change-Id: Ic6d7c8489ca4330824abb5cd1ead8f1d449d1a85 Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
2014-01-20Build system: Fixes #2: Add multi-platform supportRyan Harkin
Move all explicit platform or architecture specific references into a new platform.mk file that is defined for each platform. Change-Id: I9d6320d1ba957e0cc8d9b316b3578132331fa428 Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
2014-01-17Change comments in assembler files to help ctagsJeenu Viswambharan
Ctags seem to have a problem with generating tags for assembler symbols when a comment immediately follows an assembly label. This patch inserts a single space character between the label definition and the following comments to help ctags. The patch is generated by the command: git ls-files -- \*.S | xargs sed -i 's/^\([^:]\+\):;/\1: ;/1' Change-Id: If7a3c9d0f51207ea033cc8b8e1b34acaa0926475
2014-01-17Probe for GICv3 re-distributors on core bring-upHarry Liebel
The GICv3 distributor can have more ports than CPUs are available in the system. Probe all re-distributors and use the matching affinity levels as specified by each core and re-distributor to decide which re-distributor to use with which CPU core. If a core cannot be matched with a re-distributor, the core panics and is placed in an endless loop. Change-Id: Ie393cfe07c7449a2383959e3c968664882e18afc
2014-01-17Do not trap access to floating point registersHarry Liebel
Traps when accessing architectural features are disabled by clearing bits in CPTR_EL3 during early boot, including accesses to floating point registers. The value of this register was previously undetermined, causing unwanted traps to EL3. Future EL3 code (for example, context save/restore code) may use floating point registers, although they are not used by current code. Also, the '-mgeneral-regs-only' flag is enabled in the GCC settings to prevent generation of code that uses floating point registers. Change-Id: I9a03675f6387bbbee81a6f2c9ccf81150db03747
2014-01-17Update year in copyright text to 2014Dan Handley
Change-Id: Ic7fb61aabae1d515b9e6baf3dd003807ff42da60
2014-01-17Move GIC setup to a separate fileIan Spray
GIC setup code which used to be in bl31_plat_setup.c is now in fvp_gic.c to simplify future changes to other bootloader stages. This patch moves code from bl31_plat_setup.c to fvp_gic.c, simplifies the include file list for bl31_plat_setup.c, moves GIC declarations from the bl31.h header file into the platform.h, and reworks files according to coding style guide. Change-Id: I48d82a4ba33e7114dcc88f9ca98767a06cf8f417
2013-12-20Create local C library implementation (1/2)Harry Liebel
- This change is split into two separate patches in order to simplify the history as interpreted by 'git'. The split is between the move/rename and addition of new files. - Remove dependency on toolchain C library headers and functions in order to ensure behavioural compatibility between toolchains. - Use FreeBSD as reference for C library implementation. - Do not let GCC use default library include paths. - Remove unused definitions in modified headers and implementations. - Move C library files to 'lib/stdlib' and 'include/stdlib'. - Break std.c functions out into separate files. Change-Id: I91cddfb3229775f770ad781589670c57d347a154
2013-12-12Make BL31's ns_entry_info a single-cpu areaSandrine Bailleux
ns_entry_info used to be a per-cpu array. This is a waste of space because it is only accessed by the primary CPU on the cold boot path. This patch reduces ns_entry_info to a single-cpu area. Change-Id: I647c70c4e76069560f1aaad37a1d5910f56fba4c
2013-12-12Move RUN_IMAGE constant from bl1.h to bl_common.hSandrine Bailleux
RUN_IMAGE constant is used by all bootloader stages. Change-Id: I1b4e28d8fcf3ad1363f202c859f5efab0f320efe
2013-12-05rework general purpose registers save and restoreAchin Gupta
The runtime exception handling assembler code used magic numbers for saving and restoring the general purpose register context on stack memory. The memory is interpreted as a 'gp_regs' structure and the magic numbers are offsets to members of this structure. This patch replaces the magic number offsets with constants. It also adds compile time assertions to prevent an incorrect assembler view of this structure. Change-Id: Ibf125bfdd62ba3a33e58c5f1d71f8c229720781c
2013-12-05Enable third party contributionsDan Handley
- Add instructions for contributing to ARM Trusted Firmware. - Update copyright text in all files to acknowledge contributors. Change-Id: I9311aac81b00c6c167d2f8c889aea403b84450e5
2013-12-05Properly initialise the C runtime environmentSandrine Bailleux
This patch makes sure the C runtime environment is properly initialised before executing any C code. - Zero-initialise NOBITS sections (e.g. the bss section). - Relocate BL1 data from ROM to RAM. Change-Id: I0da81b417b2f0d1f7ef667cc5131b1e47e22571f
2013-12-05Various improvements/cleanups on the linker scriptsSandrine Bailleux
- Check at link-time that bootloader images will fit in memory at run time and that they won't overlap each other. - Remove text and rodata orphan sections. - Define new linker symbols to remove the need for platform setup code to know the order of sections. - Reduce the size of the raw binary images by cutting some sections out of the disk image and allocating them at load time, whenever possible. - Rework alignment constraints on sections. - Remove unused linker symbols. - Homogenize linker symbols names across all BLs. - Add some comments in the linker scripts. Change-Id: I47a328af0ccc7c8ab47fcc0dc6e7dd26160610b9
2013-11-27Unmask SError and Debug exceptions.Sandrine Bailleux
Any asynchronous exception caused by the firmware should be handled in the firmware itself. For this reason, unmask SError exceptions (and Debug ones as well) on all boot paths. Also route external abort and SError interrupts to EL3, otherwise they will target EL1. Change-Id: I9c191d2d0dcfef85f265641c8460dfbb4d112092
2013-11-27Fix inlining of GIC helper functionsSandrine Bailleux
Change-Id: I27aad560a5da21c0439f3ccc9dc07b026e7c6022
2013-11-27Move generic architectural setup out of blx_plat_arch_setup().Sandrine Bailleux
blx_plat_arch_setup() should only perform platform-specific architectural setup, e.g. enabling the MMU. This patch moves generic architectural setup code out of blx_plat_arch_setup(). Change-Id: I4ccf56b8c4a2fa84909817779a2d97a14aaafab6
2013-10-25ARMv8 Trusted Firmware release v0.2v0.2Achin Gupta