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-rw-r--r--plat/common/aarch64/platform_helpers.S12
-rw-r--r--plat/fvp/aarch64/bl1_plat_helpers.S8
2 files changed, 10 insertions, 10 deletions
diff --git a/plat/common/aarch64/platform_helpers.S b/plat/common/aarch64/platform_helpers.S
index 6388718..3cea9f6 100644
--- a/plat/common/aarch64/platform_helpers.S
+++ b/plat/common/aarch64/platform_helpers.S
@@ -59,7 +59,7 @@
* SCTLR.C bit e.g. while powering down a cpu
* -----------------------------------------------------
*/
-platform_set_coherent_stack:; .type platform_set_coherent_stack, %function
+platform_set_coherent_stack: ; .type platform_set_coherent_stack, %function
mov x5, x30 // lr
bl platform_get_core_pos
add x0, x0, #1
@@ -76,7 +76,7 @@ platform_set_coherent_stack:; .type platform_set_coherent_stack, %function
* CoreId
* -----------------------------------------------------
*/
-platform_get_core_pos:; .type platform_get_core_pos, %function
+platform_get_core_pos: ; .type platform_get_core_pos, %function
and x1, x0, #MPIDR_CPU_MASK
and x0, x0, #MPIDR_CLUSTER_MASK
add x0, x1, x0, LSR #6
@@ -90,7 +90,7 @@ platform_get_core_pos:; .type platform_get_core_pos, %function
* cpu (applicable ony after a cold boot)
* -----------------------------------------------------
*/
-platform_is_primary_cpu:; .type platform_is_primary_cpu, %function
+platform_is_primary_cpu: ; .type platform_is_primary_cpu, %function
and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
cmp x0, #PRIMARY_CPU
cset x0, eq
@@ -100,7 +100,7 @@ platform_is_primary_cpu:; .type platform_is_primary_cpu, %function
* void platform_get_stack (unsigned long mpidr)
* -----------------------------------------------------
*/
-platform_get_stack:; .type platform_get_stack, %function
+platform_get_stack: ; .type platform_get_stack, %function
mov x10, x30 // lr
bl platform_get_core_pos
add x0, x0, #1
@@ -114,7 +114,7 @@ platform_get_stack:; .type platform_get_stack, %function
* void platform_set_stack (unsigned long mpidr)
* -----------------------------------------------------
*/
-platform_set_stack:; .type platform_set_stack, %function
+platform_set_stack: ; .type platform_set_stack, %function
mov x9, x30 // lr
bl platform_get_stack
mov sp, x0
@@ -125,7 +125,7 @@ platform_set_stack:; .type platform_set_stack, %function
* each platform.
* -----------------------------------------------------
*/
-platform_check_mpidr:; .type platform_check_mpidr, %function
+platform_check_mpidr: ; .type platform_check_mpidr, %function
mov x0, xzr
ret
diff --git a/plat/fvp/aarch64/bl1_plat_helpers.S b/plat/fvp/aarch64/bl1_plat_helpers.S
index f8cfd66..e3cf5c8 100644
--- a/plat/fvp/aarch64/bl1_plat_helpers.S
+++ b/plat/fvp/aarch64/bl1_plat_helpers.S
@@ -60,7 +60,7 @@
* that the request has gone through.
* -----------------------------------------------------
*/
-plat_secondary_cold_boot_setup:; .type plat_secondary_cold_boot_setup, %function
+plat_secondary_cold_boot_setup: ; .type plat_secondary_cold_boot_setup, %function
bl read_mpidr
mov x19, x0
bl platform_get_core_pos
@@ -136,7 +136,7 @@ cb_panic:
* reset all cpus will read the same WK field
* -----------------------------------------------------
*/
-platform_get_entrypoint:; .type platform_get_entrypoint, %function
+platform_get_entrypoint: ; .type platform_get_entrypoint, %function
mov x9, x30 // lr
mov x2, x0
ldr x1, =PWRC_BASE
@@ -176,7 +176,7 @@ _panic: b _panic
* BL1 will always read the mailboxes with the MMU off
* -----------------------------------------------------
*/
-platform_mem_init:; .type platform_mem_init, %function
+platform_mem_init: ; .type platform_mem_init, %function
ldr x0, =TZDRAM_BASE + MBOX_OFF
stp xzr, xzr, [x0, #0]
stp xzr, xzr, [x0, #0x10]
@@ -192,7 +192,7 @@ platform_mem_init:; .type platform_mem_init, %function
* boot to perform early platform initialization
* -----------------------------------------------------
*/
-platform_cold_boot_init:; .type platform_cold_boot_init, %function
+platform_cold_boot_init: ; .type platform_cold_boot_init, %function
mov x20, x0
bl platform_mem_init
bl read_mpidr