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-rw-r--r--bl32/tsp/aarch64/tsp_entrypoint.S23
-rw-r--r--bl32/tsp/tsp_main.c25
2 files changed, 18 insertions, 30 deletions
diff --git a/bl32/tsp/aarch64/tsp_entrypoint.S b/bl32/tsp/aarch64/tsp_entrypoint.S
index 9999c43..8fdfbc3 100644
--- a/bl32/tsp/aarch64/tsp_entrypoint.S
+++ b/bl32/tsp/aarch64/tsp_entrypoint.S
@@ -34,13 +34,7 @@
.globl tsp_entrypoint
- .globl tsp_cpu_on_entry
- .globl tsp_cpu_off_entry
- .globl tsp_cpu_suspend_entry
- .globl tsp_cpu_resume_entry
- .globl tsp_fast_smc_entry
- .globl tsp_std_smc_entry
- .globl tsp_fiq_entry
+ .globl tsp_vector_table
@@ -157,6 +151,21 @@ func tsp_entrypoint
tsp_entrypoint_panic:
b tsp_entrypoint_panic
+
+ /* -------------------------------------------
+ * Table of entrypoint vectors provided to the
+ * TSPD for the various entrypoints
+ * -------------------------------------------
+ */
+func tsp_vector_table
+ b tsp_std_smc_entry
+ b tsp_fast_smc_entry
+ b tsp_cpu_on_entry
+ b tsp_cpu_off_entry
+ b tsp_cpu_resume_entry
+ b tsp_cpu_suspend_entry
+ b tsp_fiq_entry
+
/*---------------------------------------------
* This entrypoint is used by the TSPD when this
* cpu is to be turned off through a CPU_OFF
diff --git a/bl32/tsp/tsp_main.c b/bl32/tsp/tsp_main.c
index 1c3f3b9..ad7ee0a 100644
--- a/bl32/tsp/tsp_main.c
+++ b/bl32/tsp/tsp_main.c
@@ -61,22 +61,6 @@ static tsp_args_t tsp_smc_args[PLATFORM_CORE_COUNT];
work_statistics_t tsp_stats[PLATFORM_CORE_COUNT];
/*******************************************************************************
- * Single reference to the various entry points exported by the test secure
- * payload. A single copy should suffice for all cpus as they are not expected
- * to change.
- ******************************************************************************/
-static const entry_info_t tsp_entry_info = {
- tsp_std_smc_entry,
- tsp_fast_smc_entry,
- tsp_cpu_on_entry,
- tsp_cpu_off_entry,
- tsp_cpu_resume_entry,
- tsp_cpu_suspend_entry,
- tsp_fiq_entry,
-};
-
-
-/*******************************************************************************
* The BL32 memory footprint starts with an RO sections and ends
* with a section for coherent RAM. Use it to find the memory size
******************************************************************************/
@@ -118,7 +102,7 @@ static tsp_args_t *set_smc_args(uint64_t arg0,
/*******************************************************************************
* TSP main entry point where it gets the opportunity to initialize its secure
* state/applications. Once the state is initialized, it must return to the
- * SPD with a pointer to the 'tsp_entry_info' structure.
+ * SPD with a pointer to the 'tsp_vector_table' jump table.
******************************************************************************/
uint64_t tsp_main(void)
{
@@ -147,12 +131,7 @@ uint64_t tsp_main(void)
tsp_stats[linear_id].cpu_on_count);
spin_unlock(&console_lock);
- /*
- * TODO: There is a massive assumption that the SPD and SP can see each
- * other's memory without issues so it is safe to pass pointers to
- * internal memory. Replace this with a shared communication buffer.
- */
- return (uint64_t) &tsp_entry_info;
+ return (uint64_t) &tsp_vector_table;
}
/*******************************************************************************