diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/system/gic/gic.h | 6 | ||||
-rw-r--r-- | arch/system/gic/gic_v3.c | 79 | ||||
-rw-r--r-- | arch/system/gic/gic_v3.h | 20 |
3 files changed, 103 insertions, 2 deletions
diff --git a/arch/system/gic/gic.h b/arch/system/gic/gic.h index 90a6615..9e9fb73 100644 --- a/arch/system/gic/gic.h +++ b/arch/system/gic/gic.h @@ -129,12 +129,18 @@ /* GICv3 Re-distributor interface registers & shifts */ #define GICR_PCPUBASE_SHIFT 0x11 +#define GICR_TYPER 0x08 #define GICR_WAKER 0x14 /* GICR_WAKER bit definitions */ #define WAKER_CA (1UL << 2) #define WAKER_PS (1UL << 1) +/* GICR_TYPER bit definitions */ +#define GICR_TYPER_AFF_SHIFT 32 +#define GICR_TYPER_AFF_MASK 0xffffffff +#define GICR_TYPER_LAST (1UL << 4) + /* GICv3 ICC_SRE register bit definitions*/ #define ICC_SRE_EN (1UL << 3) #define ICC_SRE_SRE (1UL << 0) diff --git a/arch/system/gic/gic_v3.c b/arch/system/gic/gic_v3.c new file mode 100644 index 0000000..2fef539 --- /dev/null +++ b/arch/system/gic/gic_v3.c @@ -0,0 +1,79 @@ +/* + * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include <stdint.h> +#include <arch.h> +#include <platform.h> +#include <gic.h> +#include <gic_v3.h> +#include <debug.h> + +uintptr_t gicv3_get_rdist(uintptr_t gicr_base, uint64_t mpidr) +{ + uint32_t cpu_aff, gicr_aff; + uint64_t gicr_typer; + uintptr_t addr; + + /* Construct the affinity as used by GICv3. MPIDR and GIC affinity level + * mask is the same. + */ + cpu_aff = ((mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK) << + GICV3_AFF0_SHIFT; + cpu_aff |= ((mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK) << + GICV3_AFF1_SHIFT; + cpu_aff |= ((mpidr >> MPIDR_AFF2_SHIFT) & MPIDR_AFFLVL_MASK) << + GICV3_AFF2_SHIFT; + cpu_aff |= ((mpidr >> MPIDR_AFF3_SHIFT) & MPIDR_AFFLVL_MASK) << + GICV3_AFF3_SHIFT; + + addr = gicr_base; + do { + gicr_typer = gicr_read_typer(addr); + + gicr_aff = (gicr_typer >> GICR_TYPER_AFF_SHIFT) & + GICR_TYPER_AFF_MASK; + if (cpu_aff == gicr_aff) { + INFO("GICv3 - Found RDIST for MPIDR(0x%lx) at 0x%lx\n", + mpidr, addr); + return addr; + } + + /* TODO: + * For GICv4 we need to adjust the Base address based on + * GICR_TYPER.VLPIS + */ + addr += (1 << GICR_PCPUBASE_SHIFT); + + } while (!(gicr_typer & GICR_TYPER_LAST)); + + /* If we get here we did not find a match. */ + ERROR("GICv3 - Did not find RDIST for CPU with MPIDR 0x%lx\n", mpidr); + return (uintptr_t)NULL; +} diff --git a/arch/system/gic/gic_v3.h b/arch/system/gic/gic_v3.h index 9ff46f1..df7e7fd 100644 --- a/arch/system/gic/gic_v3.h +++ b/arch/system/gic/gic_v3.h @@ -31,19 +31,35 @@ #ifndef __GIC_V3_H__ #define __GIC_V3_H__ +#include <stdint.h> #include <mmio.h> +#define GICV3_AFFLVL_MASK 0xff +#define GICV3_AFF0_SHIFT 0 +#define GICV3_AFF1_SHIFT 8 +#define GICV3_AFF2_SHIFT 16 +#define GICV3_AFF3_SHIFT 24 +#define GICV3_AFFINITY_MASK 0xffffffff + +uintptr_t gicv3_get_rdist(uintptr_t gicr_base, uint64_t mpidr); + /******************************************************************************* * GIC Redistributor interface accessors ******************************************************************************/ -static inline unsigned int gicr_read_waker(unsigned int base) +static inline uint32_t gicr_read_waker(uintptr_t base) { return mmio_read_32(base + GICR_WAKER); } -static inline void gicr_write_waker(unsigned int base, unsigned int val) +static inline void gicr_write_waker(uintptr_t base, uint32_t val) { mmio_write_32(base + GICR_WAKER, val); } +static inline uint64_t gicr_read_typer(uintptr_t base) +{ + return mmio_read_64(base + GICR_TYPER); +} + + #endif /* __GIC_V3_H__ */ |