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-rw-r--r--arch/aarch64/cpu/cpu_helpers.S2
-rw-r--r--arch/system/gic/aarch64/gic_v3_sysregs.S14
-rw-r--r--bl1/aarch64/bl1_entrypoint.S2
-rw-r--r--bl2/aarch64/bl2_entrypoint.S2
-rw-r--r--bl31/aarch64/bl31_entrypoint.S2
-rw-r--r--lib/arch/aarch64/cache_helpers.S28
-rw-r--r--lib/arch/aarch64/misc_helpers.S70
-rw-r--r--lib/arch/aarch64/sysreg_helpers.S276
-rw-r--r--lib/arch/aarch64/tlb_helpers.S14
-rw-r--r--lib/semihosting/aarch64/semihosting_call.S2
-rw-r--r--lib/sync/locks/exclusive/spinlock.S4
-rw-r--r--plat/common/aarch64/platform_helpers.S12
-rw-r--r--plat/fvp/aarch64/bl1_plat_helpers.S8
13 files changed, 218 insertions, 218 deletions
diff --git a/arch/aarch64/cpu/cpu_helpers.S b/arch/aarch64/cpu/cpu_helpers.S
index 3ee5917..009f08a 100644
--- a/arch/aarch64/cpu/cpu_helpers.S
+++ b/arch/aarch64/cpu/cpu_helpers.S
@@ -35,7 +35,7 @@
.section .text, "ax"; .align 3
-cpu_reset_handler:; .type cpu_reset_handler, %function
+cpu_reset_handler: ; .type cpu_reset_handler, %function
mov x19, x30 // lr
/* ---------------------------------------------
diff --git a/arch/system/gic/aarch64/gic_v3_sysregs.S b/arch/system/gic/aarch64/gic_v3_sysregs.S
index 64c7f80..d686aeb 100644
--- a/arch/system/gic/aarch64/gic_v3_sysregs.S
+++ b/arch/system/gic/aarch64/gic_v3_sysregs.S
@@ -50,40 +50,40 @@
.section .text, "ax"; .align 3
-read_icc_sre_el1:; .type read_icc_sre_el1, %function
+read_icc_sre_el1: ; .type read_icc_sre_el1, %function
mrs x0, ICC_SRE_EL1
ret
-read_icc_sre_el2:; .type read_icc_sre_el2, %function
+read_icc_sre_el2: ; .type read_icc_sre_el2, %function
mrs x0, ICC_SRE_EL2
ret
-read_icc_sre_el3:; .type read_icc_sre_el3, %function
+read_icc_sre_el3: ; .type read_icc_sre_el3, %function
mrs x0, ICC_SRE_EL3
ret
-write_icc_sre_el1:; .type write_icc_sre_el1, %function
+write_icc_sre_el1: ; .type write_icc_sre_el1, %function
msr ICC_SRE_EL1, x0
isb
ret
-write_icc_sre_el2:; .type write_icc_sre_el2, %function
+write_icc_sre_el2: ; .type write_icc_sre_el2, %function
msr ICC_SRE_EL2, x0
isb
ret
-write_icc_sre_el3:; .type write_icc_sre_el3, %function
+write_icc_sre_el3: ; .type write_icc_sre_el3, %function
msr ICC_SRE_EL3, x0
isb
ret
-write_icc_pmr_el1:; .type write_icc_pmr_el1, %function
+write_icc_pmr_el1: ; .type write_icc_pmr_el1, %function
msr ICC_PMR_EL1, x0
isb
ret
diff --git a/bl1/aarch64/bl1_entrypoint.S b/bl1/aarch64/bl1_entrypoint.S
index f5e4420..197eac0 100644
--- a/bl1/aarch64/bl1_entrypoint.S
+++ b/bl1/aarch64/bl1_entrypoint.S
@@ -42,7 +42,7 @@
* -----------------------------------------------------
*/
-reset_handler:; .type reset_handler, %function
+reset_handler: ; .type reset_handler, %function
/* ---------------------------------------------
* Perform any processor specific actions upon
* reset e.g. cache, tlb invalidations etc.
diff --git a/bl2/aarch64/bl2_entrypoint.S b/bl2/aarch64/bl2_entrypoint.S
index e5a673d..ebb3b94 100644
--- a/bl2/aarch64/bl2_entrypoint.S
+++ b/bl2/aarch64/bl2_entrypoint.S
@@ -38,7 +38,7 @@
.section .text, "ax"; .align 3
-bl2_entrypoint:; .type bl2_entrypoint, %function
+bl2_entrypoint: ; .type bl2_entrypoint, %function
/*---------------------------------------------
* Store the extents of the tzram available to
* BL2 for future use. Use the opcode param to
diff --git a/bl31/aarch64/bl31_entrypoint.S b/bl31/aarch64/bl31_entrypoint.S
index cbbae7b..57f6551 100644
--- a/bl31/aarch64/bl31_entrypoint.S
+++ b/bl31/aarch64/bl31_entrypoint.S
@@ -44,7 +44,7 @@
* -----------------------------------------------------
*/
-bl31_entrypoint:; .type bl31_entrypoint, %function
+bl31_entrypoint: ; .type bl31_entrypoint, %function
/* ---------------------------------------------
* BL2 has populated x0,x3,x4 with the opcode
* indicating BL31 should be run, memory layout
diff --git a/lib/arch/aarch64/cache_helpers.S b/lib/arch/aarch64/cache_helpers.S
index 4072786..26e4ba7 100644
--- a/lib/arch/aarch64/cache_helpers.S
+++ b/lib/arch/aarch64/cache_helpers.S
@@ -46,56 +46,56 @@
.section .text, "ax"; .align 3
-dcisw:; .type dcisw, %function
+dcisw: ; .type dcisw, %function
dc isw, x0
dsb sy
isb
ret
-dccisw:; .type dccisw, %function
+dccisw: ; .type dccisw, %function
dc cisw, x0
dsb sy
isb
ret
-dccsw:; .type dccsw, %function
+dccsw: ; .type dccsw, %function
dc csw, x0
dsb sy
isb
ret
-dccvac:; .type dccvac, %function
+dccvac: ; .type dccvac, %function
dc cvac, x0
dsb sy
isb
ret
-dcivac:; .type dcivac, %function
+dcivac: ; .type dcivac, %function
dc ivac, x0
dsb sy
isb
ret
-dccivac:; .type dccivac, %function
+dccivac: ; .type dccivac, %function
dc civac, x0
dsb sy
isb
ret
-dccvau:; .type dccvau, %function
+dccvau: ; .type dccvau, %function
dc cvau, x0
dsb sy
isb
ret
-dczva:; .type dczva, %function
+dczva: ; .type dczva, %function
dc zva, x0
dsb sy
isb
@@ -107,7 +107,7 @@ dczva:; .type dczva, %function
* size. 'x0' = addr, 'x1' = size
* ------------------------------------------
*/
-flush_dcache_range:; .type flush_dcache_range, %function
+flush_dcache_range: ; .type flush_dcache_range, %function
dcache_line_size x2, x3
add x1, x0, x1
sub x3, x2, #1
@@ -126,7 +126,7 @@ flush_loop:
* size. 'x0' = addr, 'x1' = size
* ------------------------------------------
*/
-inv_dcache_range:; .type inv_dcache_range, %function
+inv_dcache_range: ; .type inv_dcache_range, %function
dcache_line_size x2, x3
add x1, x0, x1
sub x3, x2, #1
@@ -151,7 +151,7 @@ inv_loop:
* x14
* ----------------------------------
*/
-dcsw_op:; .type dcsw_op, %function
+dcsw_op: ; .type dcsw_op, %function
all_start_at_level:
add x2, x10, x10, lsr #1 // work out 3x current cache level
lsr x1, x0, x2 // extract cache type bits from clidr
@@ -197,7 +197,7 @@ finished:
ret
-do_dcsw_op:; .type do_dcsw_op, %function
+do_dcsw_op: ; .type do_dcsw_op, %function
cbz x3, exit
cmp x0, #DCISW
b.eq dc_isw
@@ -221,13 +221,13 @@ exit:
ret
-dcsw_op_louis:; .type dcsw_op_louis, %function
+dcsw_op_louis: ; .type dcsw_op_louis, %function
dsb sy
setup_dcsw_op_args x10, x3, x9, #LOUIS_SHIFT, #CLIDR_FIELD_WIDTH, #LEVEL_SHIFT
b do_dcsw_op
-dcsw_op_all:; .type dcsw_op_all, %function
+dcsw_op_all: ; .type dcsw_op_all, %function
dsb sy
setup_dcsw_op_args x10, x3, x9, #LOC_SHIFT, #CLIDR_FIELD_WIDTH, #LEVEL_SHIFT
b do_dcsw_op
diff --git a/lib/arch/aarch64/misc_helpers.S b/lib/arch/aarch64/misc_helpers.S
index 40545ba..37258e1 100644
--- a/lib/arch/aarch64/misc_helpers.S
+++ b/lib/arch/aarch64/misc_helpers.S
@@ -84,7 +84,7 @@
.section .text, "ax"
-save_regs:; .type save_regs, %function
+save_regs: ; .type save_regs, %function
sub sp, sp, #GPREGS_FP_OFF
stp x0, x1, [sp, #GPREGS_X0_OFF]
stp x2, x3, [sp, #GPREGS_X2_OFF]
@@ -107,7 +107,7 @@ save_regs:; .type save_regs, %function
ret
-restore_regs:; .type restore_regs, %function
+restore_regs: ; .type restore_regs, %function
ldr w9, [sp, #GPREGS_SPSR_OFF]
msr spsr_el3, x9
ldp x28, x9, [sp, #GPREGS_X28_OFF]
@@ -129,14 +129,14 @@ restore_regs:; .type restore_regs, %function
add sp, sp, #GPREGS_FP_OFF
ret
-get_afflvl_shift:; .type get_afflvl_shift, %function
+get_afflvl_shift: ; .type get_afflvl_shift, %function
cmp x0, #3
cinc x0, x0, eq
mov x1, #MPIDR_AFFLVL_SHIFT
lsl x0, x0, x1
ret
-mpidr_mask_lower_afflvls:; .type mpidr_mask_lower_afflvls, %function
+mpidr_mask_lower_afflvls: ; .type mpidr_mask_lower_afflvls, %function
cmp x1, #3
cinc x1, x1, eq
mov x2, #MPIDR_AFFLVL_SHIFT
@@ -149,17 +149,17 @@ mpidr_mask_lower_afflvls:; .type mpidr_mask_lower_afflvls, %function
* Asynchronous exception manipulation accessors
* -----------------------------------------------------
*/
-enable_irq:; .type enable_irq, %function
+enable_irq: ; .type enable_irq, %function
msr daifclr, #DAIF_IRQ_BIT
ret
-enable_fiq:; .type enable_fiq, %function
+enable_fiq: ; .type enable_fiq, %function
msr daifclr, #DAIF_FIQ_BIT
ret
-enable_serror:; .type enable_serror, %function
+enable_serror: ; .type enable_serror, %function
msr daifclr, #DAIF_ABT_BIT
ret
@@ -169,17 +169,17 @@ enable_debug_exceptions:
ret
-disable_irq:; .type disable_irq, %function
+disable_irq: ; .type disable_irq, %function
msr daifset, #DAIF_IRQ_BIT
ret
-disable_fiq:; .type disable_fiq, %function
+disable_fiq: ; .type disable_fiq, %function
msr daifset, #DAIF_FIQ_BIT
ret
-disable_serror:; .type disable_serror, %function
+disable_serror: ; .type disable_serror, %function
msr daifset, #DAIF_ABT_BIT
ret
@@ -189,17 +189,17 @@ disable_debug_exceptions:
ret
-read_daif:; .type read_daif, %function
+read_daif: ; .type read_daif, %function
mrs x0, daif
ret
-write_daif:; .type write_daif, %function
+write_daif: ; .type write_daif, %function
msr daif, x0
ret
-read_spsr:; .type read_spsr, %function
+read_spsr: ; .type read_spsr, %function
mrs x0, CurrentEl
cmp x0, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq read_spsr_el1
@@ -209,22 +209,22 @@ read_spsr:; .type read_spsr, %function
b.eq read_spsr_el3
-read_spsr_el1:; .type read_spsr_el1, %function
+read_spsr_el1: ; .type read_spsr_el1, %function
mrs x0, spsr_el1
ret
-read_spsr_el2:; .type read_spsr_el2, %function
+read_spsr_el2: ; .type read_spsr_el2, %function
mrs x0, spsr_el2
ret
-read_spsr_el3:; .type read_spsr_el3, %function
+read_spsr_el3: ; .type read_spsr_el3, %function
mrs x0, spsr_el3
ret
-write_spsr:; .type write_spsr, %function
+write_spsr: ; .type write_spsr, %function
mrs x1, CurrentEl
cmp x1, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq write_spsr_el1
@@ -234,25 +234,25 @@ write_spsr:; .type write_spsr, %function
b.eq write_spsr_el3
-write_spsr_el1:; .type write_spsr_el1, %function
+write_spsr_el1: ; .type write_spsr_el1, %function
msr spsr_el1, x0
isb
ret
-write_spsr_el2:; .type write_spsr_el2, %function
+write_spsr_el2: ; .type write_spsr_el2, %function
msr spsr_el2, x0
isb
ret
-write_spsr_el3:; .type write_spsr_el3, %function
+write_spsr_el3: ; .type write_spsr_el3, %function
msr spsr_el3, x0
isb
ret
-read_elr:; .type read_elr, %function
+read_elr: ; .type read_elr, %function
mrs x0, CurrentEl
cmp x0, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq read_elr_el1
@@ -262,22 +262,22 @@ read_elr:; .type read_elr, %function
b.eq read_elr_el3
-read_elr_el1:; .type read_elr_el1, %function
+read_elr_el1: ; .type read_elr_el1, %function
mrs x0, elr_el1
ret
-read_elr_el2:; .type read_elr_el2, %function
+read_elr_el2: ; .type read_elr_el2, %function
mrs x0, elr_el2
ret
-read_elr_el3:; .type read_elr_el3, %function
+read_elr_el3: ; .type read_elr_el3, %function
mrs x0, elr_el3
ret
-write_elr:; .type write_elr, %function
+write_elr: ; .type write_elr, %function
mrs x1, CurrentEl
cmp x1, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq write_elr_el1
@@ -287,54 +287,54 @@ write_elr:; .type write_elr, %function
b.eq write_elr_el3
-write_elr_el1:; .type write_elr_el1, %function
+write_elr_el1: ; .type write_elr_el1, %function
msr elr_el1, x0
isb
ret
-write_elr_el2:; .type write_elr_el2, %function
+write_elr_el2: ; .type write_elr_el2, %function
msr elr_el2, x0
isb
ret
-write_elr_el3:; .type write_elr_el3, %function
+write_elr_el3: ; .type write_elr_el3, %function
msr elr_el3, x0
isb
ret
-dsb:; .type dsb, %function
+dsb: ; .type dsb, %function
dsb sy
ret
-isb:; .type isb, %function
+isb: ; .type isb, %function
isb
ret
-sev:; .type sev, %function
+sev: ; .type sev, %function
sev
ret
-wfe:; .type wfe, %function
+wfe: ; .type wfe, %function
wfe
ret
-wfi:; .type wfi, %function
+wfi: ; .type wfi, %function
wfi
ret
-eret:; .type eret, %function
+eret: ; .type eret, %function
eret
-smc:; .type smc, %function
+smc: ; .type smc, %function
smc #0
/* -----------------------------------------------------------------------
diff --git a/lib/arch/aarch64/sysreg_helpers.S b/lib/arch/aarch64/sysreg_helpers.S
index 2faae2a..6650419 100644
--- a/lib/arch/aarch64/sysreg_helpers.S
+++ b/lib/arch/aarch64/sysreg_helpers.S
@@ -194,17 +194,17 @@
.section .text, "ax"
-read_current_el:; .type read_current_el, %function
+read_current_el: ; .type read_current_el, %function
mrs x0, CurrentEl
ret
-read_id_pfr1_el1:; .type read_id_pfr1_el1, %function
+read_id_pfr1_el1: ; .type read_id_pfr1_el1, %function
mrs x0, id_pfr1_el1
ret
-read_id_aa64pfr0_el1:; .type read_id_aa64pfr0_el1, %function
+read_id_aa64pfr0_el1: ; .type read_id_aa64pfr0_el1, %function
mrs x0, id_aa64pfr0_el1
ret
@@ -213,7 +213,7 @@ read_id_aa64pfr0_el1:; .type read_id_aa64pfr0_el1, %function
* VBAR accessors
* -----------------------------------------------------
*/
-read_vbar:; .type read_vbar, %function
+read_vbar: ; .type read_vbar, %function
mrs x0, CurrentEl
cmp x0, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq read_vbar_el1
@@ -223,22 +223,22 @@ read_vbar:; .type read_vbar, %function
b.eq read_vbar_el3
-read_vbar_el1:; .type read_vbar_el1, %function
+read_vbar_el1: ; .type read_vbar_el1, %function
mrs x0, vbar_el1
ret
-read_vbar_el2:; .type read_vbar_el2, %function
+read_vbar_el2: ; .type read_vbar_el2, %function
mrs x0, vbar_el2
ret
-read_vbar_el3:; .type read_vbar_el3, %function
+read_vbar_el3: ; .type read_vbar_el3, %function
mrs x0, vbar_el3
ret
-write_vbar:; .type write_vbar, %function
+write_vbar: ; .type write_vbar, %function
mrs x1, CurrentEl
cmp x1, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq write_vbar_el1
@@ -248,19 +248,19 @@ write_vbar:; .type write_vbar, %function
b.eq write_vbar_el3
-write_vbar_el1:; .type write_vbar_el1, %function
+write_vbar_el1: ; .type write_vbar_el1, %function
msr vbar_el1, x0
isb
ret
-write_vbar_el2:; .type write_vbar_el2, %function
+write_vbar_el2: ; .type write_vbar_el2, %function
msr vbar_el2, x0
isb
ret
-write_vbar_el3:; .type write_vbar_el3, %function
+write_vbar_el3: ; .type write_vbar_el3, %function
msr vbar_el3, x0
isb
ret
@@ -270,7 +270,7 @@ write_vbar_el3:; .type write_vbar_el3, %function
* AFSR0 accessors
* -----------------------------------------------------
*/
-read_afsr0:; .type read_afsr0, %function
+read_afsr0: ; .type read_afsr0, %function
mrs x0, CurrentEl
cmp x0, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq read_afsr0_el1
@@ -280,22 +280,22 @@ read_afsr0:; .type read_afsr0, %function
b.eq read_afsr0_el3
-read_afsr0_el1:; .type read_afsr0_el1, %function
+read_afsr0_el1: ; .type read_afsr0_el1, %function
mrs x0, afsr0_el1
ret
-read_afsr0_el2:; .type read_afsr0_el2, %function
+read_afsr0_el2: ; .type read_afsr0_el2, %function
mrs x0, afsr0_el2
ret
-read_afsr0_el3:; .type read_afsr0_el3, %function
+read_afsr0_el3: ; .type read_afsr0_el3, %function
mrs x0, afsr0_el3
ret
-write_afsr0:; .type write_afsr0, %function
+write_afsr0: ; .type write_afsr0, %function
mrs x1, CurrentEl
cmp x1, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq write_afsr0_el1
@@ -305,19 +305,19 @@ write_afsr0:; .type write_afsr0, %function
b.eq write_afsr0_el3
-write_afsr0_el1:; .type write_afsr0_el1, %function
+write_afsr0_el1: ; .type write_afsr0_el1, %function
msr afsr0_el1, x0
isb
ret
-write_afsr0_el2:; .type write_afsr0_el2, %function
+write_afsr0_el2: ; .type write_afsr0_el2, %function
msr afsr0_el2, x0
isb
ret
-write_afsr0_el3:; .type write_afsr0_el3, %function
+write_afsr0_el3: ; .type write_afsr0_el3, %function
msr afsr0_el3, x0
isb
ret
@@ -327,7 +327,7 @@ write_afsr0_el3:; .type write_afsr0_el3, %function
* FAR accessors
* -----------------------------------------------------
*/
-read_far:; .type read_far, %function
+read_far: ; .type read_far, %function
mrs x0, CurrentEl
cmp x0, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq read_far_el1
@@ -337,22 +337,22 @@ read_far:; .type read_far, %function
b.eq read_far_el3
-read_far_el1:; .type read_far_el1, %function
+read_far_el1: ; .type read_far_el1, %function
mrs x0, far_el1
ret
-read_far_el2:; .type read_far_el2, %function
+read_far_el2: ; .type read_far_el2, %function
mrs x0, far_el2
ret
-read_far_el3:; .type read_far_el3, %function
+read_far_el3: ; .type read_far_el3, %function
mrs x0, far_el3
ret
-write_far:; .type write_far, %function
+write_far: ; .type write_far, %function
mrs x1, CurrentEl
cmp x1, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq write_far_el1
@@ -362,19 +362,19 @@ write_far:; .type write_far, %function
b.eq write_far_el3
-write_far_el1:; .type write_far_el1, %function
+write_far_el1: ; .type write_far_el1, %function
msr far_el1, x0
isb
ret
-write_far_el2:; .type write_far_el2, %function
+write_far_el2: ; .type write_far_el2, %function
msr far_el2, x0
isb
ret
-write_far_el3:; .type write_far_el3, %function
+write_far_el3: ; .type write_far_el3, %function
msr far_el3, x0
isb
ret
@@ -384,7 +384,7 @@ write_far_el3:; .type write_far_el3, %function
* MAIR accessors
* -----------------------------------------------------
*/
-read_mair:; .type read_mair, %function
+read_mair: ; .type read_mair, %function
mrs x0, CurrentEl
cmp x0, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq read_mair_el1
@@ -394,22 +394,22 @@ read_mair:; .type read_mair, %function
b.eq read_mair_el3
-read_mair_el1:; .type read_mair_el1, %function
+read_mair_el1: ; .type read_mair_el1, %function
mrs x0, mair_el1
ret
-read_mair_el2:; .type read_mair_el2, %function
+read_mair_el2: ; .type read_mair_el2, %function
mrs x0, mair_el2
ret
-read_mair_el3:; .type read_mair_el3, %function
+read_mair_el3: ; .type read_mair_el3, %function
mrs x0, mair_el3
ret
-write_mair:; .type write_mair, %function
+write_mair: ; .type write_mair, %function
mrs x1, CurrentEl
cmp x1, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq write_mair_el1
@@ -419,19 +419,19 @@ write_mair:; .type write_mair, %function
b.eq write_mair_el3
-write_mair_el1:; .type write_mair_el1, %function
+write_mair_el1: ; .type write_mair_el1, %function
msr mair_el1, x0
isb
ret
-write_mair_el2:; .type write_mair_el2, %function
+write_mair_el2: ; .type write_mair_el2, %function
msr mair_el2, x0
isb
ret
-write_mair_el3:; .type write_mair_el3, %function
+write_mair_el3: ; .type write_mair_el3, %function
msr mair_el3, x0
isb
ret
@@ -441,7 +441,7 @@ write_mair_el3:; .type write_mair_el3, %function
* AMAIR accessors
* -----------------------------------------------------
*/
-read_amair:; .type read_amair, %function
+read_amair: ; .type read_amair, %function
mrs x0, CurrentEl
cmp x0, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq read_amair_el1
@@ -451,22 +451,22 @@ read_amair:; .type read_amair, %function
b.eq read_amair_el3
-read_amair_el1:; .type read_amair_el1, %function
+read_amair_el1: ; .type read_amair_el1, %function
mrs x0, amair_el1
ret
-read_amair_el2:; .type read_amair_el2, %function
+read_amair_el2: ; .type read_amair_el2, %function
mrs x0, amair_el2
ret
-read_amair_el3:; .type read_amair_el3, %function
+read_amair_el3: ; .type read_amair_el3, %function
mrs x0, amair_el3
ret
-write_amair:; .type write_amair, %function
+write_amair: ; .type write_amair, %function
mrs x1, CurrentEl
cmp x1, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq write_amair_el1
@@ -476,19 +476,19 @@ write_amair:; .type write_amair, %function
b.eq write_amair_el3
-write_amair_el1:; .type write_amair_el1, %function
+write_amair_el1: ; .type write_amair_el1, %function
msr amair_el1, x0
isb
ret
-write_amair_el2:; .type write_amair_el2, %function
+write_amair_el2: ; .type write_amair_el2, %function
msr amair_el2, x0
isb
ret
-write_amair_el3:; .type write_amair_el3, %function
+write_amair_el3: ; .type write_amair_el3, %function
msr amair_el3, x0
isb
ret
@@ -498,7 +498,7 @@ write_amair_el3:; .type write_amair_el3, %function
* RVBAR accessors
* -----------------------------------------------------
*/
-read_rvbar:; .type read_rvbar, %function
+read_rvbar: ; .type read_rvbar, %function
mrs x0, CurrentEl
cmp x0, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq read_rvbar_el1
@@ -508,17 +508,17 @@ read_rvbar:; .type read_rvbar, %function
b.eq read_rvbar_el3
-read_rvbar_el1:; .type read_rvbar_el1, %function
+read_rvbar_el1: ; .type read_rvbar_el1, %function
mrs x0, rvbar_el1
ret
-read_rvbar_el2:; .type read_rvbar_el2, %function
+read_rvbar_el2: ; .type read_rvbar_el2, %function
mrs x0, rvbar_el2
ret
-read_rvbar_el3:; .type read_rvbar_el3, %function
+read_rvbar_el3: ; .type read_rvbar_el3, %function
mrs x0, rvbar_el3
ret
@@ -527,7 +527,7 @@ read_rvbar_el3:; .type read_rvbar_el3, %function
* RMR accessors
* -----------------------------------------------------
*/
-read_rmr:; .type read_rmr, %function
+read_rmr: ; .type read_rmr, %function
mrs x0, CurrentEl
cmp x0, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq read_rmr_el1
@@ -537,22 +537,22 @@ read_rmr:; .type read_rmr, %function
b.eq read_rmr_el3
-read_rmr_el1:; .type read_rmr_el1, %function
+read_rmr_el1: ; .type read_rmr_el1, %function
mrs x0, rmr_el1
ret
-read_rmr_el2:; .type read_rmr_el2, %function
+read_rmr_el2: ; .type read_rmr_el2, %function
mrs x0, rmr_el2
ret
-read_rmr_el3:; .type read_rmr_el3, %function
+read_rmr_el3: ; .type read_rmr_el3, %function
mrs x0, rmr_el3
ret
-write_rmr:; .type write_rmr, %function
+write_rmr: ; .type write_rmr, %function
mrs x1, CurrentEl
cmp x1, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq write_rmr_el1
@@ -562,25 +562,25 @@ write_rmr:; .type write_rmr, %function
b.eq write_rmr_el3
-write_rmr_el1:; .type write_rmr_el1, %function
+write_rmr_el1: ; .type write_rmr_el1, %function
msr rmr_el1, x0
isb
ret
-write_rmr_el2:; .type write_rmr_el2, %function
+write_rmr_el2: ; .type write_rmr_el2, %function
msr rmr_el2, x0
isb
ret
-write_rmr_el3:; .type write_rmr_el3, %function
+write_rmr_el3: ; .type write_rmr_el3, %function
msr rmr_el3, x0
isb
ret
-read_afsr1:; .type read_afsr1, %function
+read_afsr1: ; .type read_afsr1, %function
mrs x0, CurrentEl
cmp x0, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq read_afsr1_el1
@@ -594,22 +594,22 @@ read_afsr1:; .type read_afsr1, %function
* AFSR1 accessors
* -----------------------------------------------------
*/
-read_afsr1_el1:; .type read_afsr1_el1, %function
+read_afsr1_el1: ; .type read_afsr1_el1, %function
mrs x0, afsr1_el1
ret
-read_afsr1_el2:; .type read_afsr1_el2, %function
+read_afsr1_el2: ; .type read_afsr1_el2, %function
mrs x0, afsr1_el2
ret
-read_afsr1_el3:; .type read_afsr1_el3, %function
+read_afsr1_el3: ; .type read_afsr1_el3, %function
mrs x0, afsr1_el3
ret
-write_afsr1:; .type write_afsr1, %function
+write_afsr1: ; .type write_afsr1, %function
mrs x1, CurrentEl
cmp x1, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq write_afsr1_el1
@@ -619,19 +619,19 @@ write_afsr1:; .type write_afsr1, %function
b.eq write_afsr1_el3
-write_afsr1_el1:; .type write_afsr1_el1, %function
+write_afsr1_el1: ; .type write_afsr1_el1, %function
msr afsr1_el1, x0
isb
ret
-write_afsr1_el2:; .type write_afsr1_el2, %function
+write_afsr1_el2: ; .type write_afsr1_el2, %function
msr afsr1_el2, x0
isb
ret
-write_afsr1_el3:; .type write_afsr1_el3, %function
+write_afsr1_el3: ; .type write_afsr1_el3, %function
msr afsr1_el3, x0
isb
ret
@@ -641,7 +641,7 @@ write_afsr1_el3:; .type write_afsr1_el3, %function
* SCTLR accessors
* -----------------------------------------------------
*/
-read_sctlr:; .type read_sctlr, %function
+read_sctlr: ; .type read_sctlr, %function
mrs x0, CurrentEl
cmp x0, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq read_sctlr_el1
@@ -651,22 +651,22 @@ read_sctlr:; .type read_sctlr, %function
b.eq read_sctlr_el3
-read_sctlr_el1:; .type read_sctlr_el1, %function
+read_sctlr_el1: ; .type read_sctlr_el1, %function
mrs x0, sctlr_el1
ret
-read_sctlr_el2:; .type read_sctlr_el2, %function
+read_sctlr_el2: ; .type read_sctlr_el2, %function
mrs x0, sctlr_el2
ret
-read_sctlr_el3:; .type read_sctlr_el3, %function
+read_sctlr_el3: ; .type read_sctlr_el3, %function
mrs x0, sctlr_el3
ret
-write_sctlr:; .type write_sctlr, %function
+write_sctlr: ; .type write_sctlr, %function
mrs x1, CurrentEl
cmp x1, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq write_sctlr_el1
@@ -676,21 +676,21 @@ write_sctlr:; .type write_sctlr, %function
b.eq write_sctlr_el3
-write_sctlr_el1:; .type write_sctlr_el1, %function
+write_sctlr_el1: ; .type write_sctlr_el1, %function
msr sctlr_el1, x0
dsb sy
isb
ret
-write_sctlr_el2:; .type write_sctlr_el2, %function
+write_sctlr_el2: ; .type write_sctlr_el2, %function
msr sctlr_el2, x0
dsb sy
isb
ret
-write_sctlr_el3:; .type write_sctlr_el3, %function
+write_sctlr_el3: ; .type write_sctlr_el3, %function
msr sctlr_el3, x0
dsb sy
isb
@@ -701,7 +701,7 @@ write_sctlr_el3:; .type write_sctlr_el3, %function
* ACTLR accessors
* -----------------------------------------------------
*/
-read_actlr:; .type read_actlr, %function
+read_actlr: ; .type read_actlr, %function
mrs x0, CurrentEl
cmp x0, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq read_actlr_el1
@@ -711,22 +711,22 @@ read_actlr:; .type read_actlr, %function
b.eq read_actlr_el3
-read_actlr_el1:; .type read_actlr_el1, %function
+read_actlr_el1: ; .type read_actlr_el1, %function
mrs x0, actlr_el1
ret
-read_actlr_el2:; .type read_actlr_el2, %function
+read_actlr_el2: ; .type read_actlr_el2, %function
mrs x0, actlr_el2
ret
-read_actlr_el3:; .type read_actlr_el3, %function
+read_actlr_el3: ; .type read_actlr_el3, %function
mrs x0, actlr_el3
ret
-write_actlr:; .type write_actlr, %function
+write_actlr: ; .type write_actlr, %function
mrs x1, CurrentEl
cmp x1, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq write_actlr_el1
@@ -736,21 +736,21 @@ write_actlr:; .type write_actlr, %function
b.eq write_actlr_el3
-write_actlr_el1:; .type write_actlr_el1, %function
+write_actlr_el1: ; .type write_actlr_el1, %function
msr actlr_el1, x0
dsb sy
isb
ret
-write_actlr_el2:; .type write_actlr_el2, %function
+write_actlr_el2: ; .type write_actlr_el2, %function
msr actlr_el2, x0
dsb sy
isb
ret
-write_actlr_el3:; .type write_actlr_el3, %function
+write_actlr_el3: ; .type write_actlr_el3, %function
msr actlr_el3, x0
dsb sy
isb
@@ -761,7 +761,7 @@ write_actlr_el3:; .type write_actlr_el3, %function
* ESR accessors
* -----------------------------------------------------
*/
-read_esr:; .type read_esr, %function
+read_esr: ; .type read_esr, %function
mrs x0, CurrentEl
cmp x0, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq read_esr_el1
@@ -771,22 +771,22 @@ read_esr:; .type read_esr, %function
b.eq read_esr_el3
-read_esr_el1:; .type read_esr_el1, %function
+read_esr_el1: ; .type read_esr_el1, %function
mrs x0, esr_el1
ret
-read_esr_el2:; .type read_esr_el2, %function
+read_esr_el2: ; .type read_esr_el2, %function
mrs x0, esr_el2
ret
-read_esr_el3:; .type read_esr_el3, %function
+read_esr_el3: ; .type read_esr_el3, %function
mrs x0, esr_el3
ret
-write_esr:; .type write_esr, %function
+write_esr: ; .type write_esr, %function
mrs x1, CurrentEl
cmp x1, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq write_esr_el1
@@ -796,21 +796,21 @@ write_esr:; .type write_esr, %function
b.eq write_esr_el3
-write_esr_el1:; .type write_esr_el1, %function
+write_esr_el1: ; .type write_esr_el1, %function
msr esr_el1, x0
dsb sy
isb
ret
-write_esr_el2:; .type write_esr_el2, %function
+write_esr_el2: ; .type write_esr_el2, %function
msr esr_el2, x0
dsb sy
isb
ret
-write_esr_el3:; .type write_esr_el3, %function
+write_esr_el3: ; .type write_esr_el3, %function
msr esr_el3, x0
dsb sy
isb
@@ -821,7 +821,7 @@ write_esr_el3:; .type write_esr_el3, %function
* TCR accessors
* -----------------------------------------------------
*/
-read_tcr:; .type read_tcr, %function
+read_tcr: ; .type read_tcr, %function
mrs x0, CurrentEl
cmp x0, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq read_tcr_el1
@@ -831,22 +831,22 @@ read_tcr:; .type read_tcr, %function
b.eq read_tcr_el3
-read_tcr_el1:; .type read_tcr_el1, %function
+read_tcr_el1: ; .type read_tcr_el1, %function
mrs x0, tcr_el1
ret
-read_tcr_el2:; .type read_tcr_el2, %function
+read_tcr_el2: ; .type read_tcr_el2, %function
mrs x0, tcr_el2
ret
-read_tcr_el3:; .type read_tcr_el3, %function
+read_tcr_el3: ; .type read_tcr_el3, %function
mrs x0, tcr_el3
ret
-write_tcr:; .type write_tcr, %function
+write_tcr: ; .type write_tcr, %function
mrs x1, CurrentEl
cmp x1, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq write_tcr_el1
@@ -856,21 +856,21 @@ write_tcr:; .type write_tcr, %function
b.eq write_tcr_el3
-write_tcr_el1:; .type write_tcr_el1, %function
+write_tcr_el1: ; .type write_tcr_el1, %function
msr tcr_el1, x0
dsb sy
isb
ret
-write_tcr_el2:; .type write_tcr_el2, %function
+write_tcr_el2: ; .type write_tcr_el2, %function
msr tcr_el2, x0
dsb sy
isb
ret
-write_tcr_el3:; .type write_tcr_el3, %function
+write_tcr_el3: ; .type write_tcr_el3, %function
msr tcr_el3, x0
dsb sy
isb
@@ -881,7 +881,7 @@ write_tcr_el3:; .type write_tcr_el3, %function
* CPTR accessors
* -----------------------------------------------------
*/
-read_cptr:; .type read_cptr, %function
+read_cptr: ; .type read_cptr, %function
mrs x0, CurrentEl
cmp x0, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq read_cptr_el1
@@ -891,22 +891,22 @@ read_cptr:; .type read_cptr, %function
b.eq read_cptr_el3
-read_cptr_el1:; .type read_cptr_el1, %function
+read_cptr_el1: ; .type read_cptr_el1, %function
b read_cptr_el1
ret
-read_cptr_el2:; .type read_cptr_el2, %function
+read_cptr_el2: ; .type read_cptr_el2, %function
mrs x0, cptr_el2
ret
-read_cptr_el3:; .type read_cptr_el3, %function
+read_cptr_el3: ; .type read_cptr_el3, %function
mrs x0, cptr_el3
ret
-write_cptr:; .type write_cptr, %function
+write_cptr: ; .type write_cptr, %function
mrs x1, CurrentEl
cmp x1, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq write_cptr_el1
@@ -916,18 +916,18 @@ write_cptr:; .type write_cptr, %function
b.eq write_cptr_el3
-write_cptr_el1:; .type write_cptr_el1, %function
+write_cptr_el1: ; .type write_cptr_el1, %function
b write_cptr_el1
-write_cptr_el2:; .type write_cptr_el2, %function
+write_cptr_el2: ; .type write_cptr_el2, %function
msr cptr_el2, x0
dsb sy
isb
ret
-write_cptr_el3:; .type write_cptr_el3, %function
+write_cptr_el3: ; .type write_cptr_el3, %function
msr cptr_el3, x0
dsb sy
isb
@@ -938,7 +938,7 @@ write_cptr_el3:; .type write_cptr_el3, %function
* TTBR0 accessors
* -----------------------------------------------------
*/
-read_ttbr0:; .type read_ttbr0, %function
+read_ttbr0: ; .type read_ttbr0, %function
mrs x0, CurrentEl
cmp x0, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq read_ttbr0_el1
@@ -948,22 +948,22 @@ read_ttbr0:; .type read_ttbr0, %function
b.eq read_ttbr0_el3
-read_ttbr0_el1:; .type read_ttbr0_el1, %function
+read_ttbr0_el1: ; .type read_ttbr0_el1, %function
mrs x0, ttbr0_el1
ret
-read_ttbr0_el2:; .type read_ttbr0_el2, %function
+read_ttbr0_el2: ; .type read_ttbr0_el2, %function
mrs x0, ttbr0_el2
ret
-read_ttbr0_el3:; .type read_ttbr0_el3, %function
+read_ttbr0_el3: ; .type read_ttbr0_el3, %function
mrs x0, ttbr0_el3
ret
-write_ttbr0:; .type write_ttbr0, %function
+write_ttbr0: ; .type write_ttbr0, %function
mrs x1, CurrentEl
cmp x1, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq write_ttbr0_el1
@@ -973,19 +973,19 @@ write_ttbr0:; .type write_ttbr0, %function
b.eq write_ttbr0_el3
-write_ttbr0_el1:; .type write_ttbr0_el1, %function
+write_ttbr0_el1: ; .type write_ttbr0_el1, %function
msr ttbr0_el1, x0
isb
ret
-write_ttbr0_el2:; .type write_ttbr0_el2, %function
+write_ttbr0_el2: ; .type write_ttbr0_el2, %function
msr ttbr0_el2, x0
isb
ret
-write_ttbr0_el3:; .type write_ttbr0_el3, %function
+write_ttbr0_el3: ; .type write_ttbr0_el3, %function
msr ttbr0_el3, x0
isb
ret
@@ -995,7 +995,7 @@ write_ttbr0_el3:; .type write_ttbr0_el3, %function
* TTBR1 accessors
* -----------------------------------------------------
*/
-read_ttbr1:; .type read_ttbr1, %function
+read_ttbr1: ; .type read_ttbr1, %function
mrs x0, CurrentEl
cmp x0, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq read_ttbr1_el1
@@ -1005,20 +1005,20 @@ read_ttbr1:; .type read_ttbr1, %function
b.eq read_ttbr1_el3
-read_ttbr1_el1:; .type read_ttbr1_el1, %function
+read_ttbr1_el1: ; .type read_ttbr1_el1, %function
mrs x0, ttbr1_el1
ret
-read_ttbr1_el2:; .type read_ttbr1_el2, %function
+read_ttbr1_el2: ; .type read_ttbr1_el2, %function
b read_ttbr1_el2
-read_ttbr1_el3:; .type read_ttbr1_el3, %function
+read_ttbr1_el3: ; .type read_ttbr1_el3, %function
b read_ttbr1_el3
-write_ttbr1:; .type write_ttbr1, %function
+write_ttbr1: ; .type write_ttbr1, %function
mrs x1, CurrentEl
cmp x1, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq write_ttbr1_el1
@@ -1028,108 +1028,108 @@ write_ttbr1:; .type write_ttbr1, %function
b.eq write_ttbr1_el3
-write_ttbr1_el1:; .type write_ttbr1_el1, %function
+write_ttbr1_el1: ; .type write_ttbr1_el1, %function
msr ttbr1_el1, x0
isb
ret
-write_ttbr1_el2:; .type write_ttbr1_el2, %function
+write_ttbr1_el2: ; .type write_ttbr1_el2, %function
b write_ttbr1_el2
-write_ttbr1_el3:; .type write_ttbr1_el3, %function
+write_ttbr1_el3: ; .type write_ttbr1_el3, %function
b write_ttbr1_el3
-read_hcr:; .type read_hcr, %function
+read_hcr: ; .type read_hcr, %function
mrs x0, hcr_el2
ret
-write_hcr:; .type write_hcr, %function
+write_hcr: ; .type write_hcr, %function
msr hcr_el2, x0
dsb sy
isb
ret
-read_cpacr:; .type read_cpacr, %function
+read_cpacr: ; .type read_cpacr, %function
mrs x0, cpacr_el1
ret
-write_cpacr:; .type write_cpacr, %function
+write_cpacr: ; .type write_cpacr, %function
msr cpacr_el1, x0
ret
-read_cntfrq_el0:; .type read_cntfrq_el0, %function
+read_cntfrq_el0: ; .type read_cntfrq_el0, %function
mrs x0, cntfrq_el0
ret
-write_cntfrq_el0:; .type write_cntfrq_el0, %function
+write_cntfrq_el0: ; .type write_cntfrq_el0, %function
msr cntfrq_el0, x0
ret
-read_cpuectlr:; .type read_cpuectlr, %function
+read_cpuectlr: ; .type read_cpuectlr, %function
mrs x0, CPUECTLR_EL1
ret
-write_cpuectlr:; .type write_cpuectlr, %function
+write_cpuectlr: ; .type write_cpuectlr, %function
msr CPUECTLR_EL1, x0
dsb sy
isb
ret
-read_cnthctl_el2:; .type read_cnthctl_el2, %function
+read_cnthctl_el2: ; .type read_cnthctl_el2, %function
mrs x0, cnthctl_el2
ret
-write_cnthctl_el2:; .type write_cnthctl_el2, %function
+write_cnthctl_el2: ; .type write_cnthctl_el2, %function
msr cnthctl_el2, x0
ret
-read_cntfrq:; .type read_cntfrq, %function
+read_cntfrq: ; .type read_cntfrq, %function
mrs x0, cntfrq_el0
ret
-write_cntfrq:; .type write_cntfrq, %function
+write_cntfrq: ; .type write_cntfrq, %function
msr cntfrq_el0, x0
ret
-write_scr:; .type write_scr, %function
+write_scr: ; .type write_scr, %function
msr scr_el3, x0
dsb sy
isb
ret
-read_scr:; .type read_scr, %function
+read_scr: ; .type read_scr, %function
mrs x0, scr_el3
ret
-read_midr:; .type read_midr, %function
+read_midr: ; .type read_midr, %function
mrs x0, midr_el1
ret
-read_mpidr:; .type read_mpidr, %function
+read_mpidr: ; .type read_mpidr, %function
mrs x0, mpidr_el1
ret
#if SUPPORT_VFP
-enable_vfp:; .type enable_vfp, %function
+enable_vfp: ; .type enable_vfp, %function
mrs x0, cpacr_el1
orr x0, x0, #CPACR_VFP_BITS
msr cpacr_el1, x0
@@ -1141,13 +1141,13 @@ enable_vfp:; .type enable_vfp, %function
// int read_fpexc(void)
-read_fpexc:; .type read_fpexc, %function
+read_fpexc: ; .type read_fpexc, %function
b read_fpexc
ret
// void write_fpexc(int fpexc)
-write_fpexc:; .type write_fpexc, %function
+write_fpexc: ; .type write_fpexc, %function
b write_fpexc
ret
diff --git a/lib/arch/aarch64/tlb_helpers.S b/lib/arch/aarch64/tlb_helpers.S
index bdda52b..69fd9f5 100644
--- a/lib/arch/aarch64/tlb_helpers.S
+++ b/lib/arch/aarch64/tlb_helpers.S
@@ -41,48 +41,48 @@
.section .text, "ax"
-tlbialle1:; .type tlbialle1, %function
+tlbialle1: ; .type tlbialle1, %function
tlbi alle1
dsb sy
isb
ret
-tlbialle1is:; .type tlbialle1is, %function
+tlbialle1is: ; .type tlbialle1is, %function
tlbi alle1is
dsb sy
isb
ret
-tlbialle2:; .type tlbialle2, %function
+tlbialle2: ; .type tlbialle2, %function
tlbi alle2
dsb sy
isb
ret
-tlbialle2is:; .type tlbialle2is, %function
+tlbialle2is: ; .type tlbialle2is, %function
tlbi alle2is
dsb sy
isb
ret
-tlbialle3:; .type tlbialle3, %function
+tlbialle3: ; .type tlbialle3, %function
tlbi alle3
dsb sy
isb
ret
-tlbialle3is:; .type tlbialle3is, %function
+tlbialle3is: ; .type tlbialle3is, %function
tlbi alle3is
dsb sy
isb
ret
-tlbivmalle1:; .type tlbivmalle1, %function
+tlbivmalle1: ; .type tlbivmalle1, %function
tlbi vmalle1
dsb sy
isb
diff --git a/lib/semihosting/aarch64/semihosting_call.S b/lib/semihosting/aarch64/semihosting_call.S
index 07145f5..9ece624 100644
--- a/lib/semihosting/aarch64/semihosting_call.S
+++ b/lib/semihosting/aarch64/semihosting_call.S
@@ -32,6 +32,6 @@
.section .text, "ax"
-semihosting_call:; .type semihosting_call, %function
+semihosting_call: ; .type semihosting_call, %function
hlt #0xf000
ret
diff --git a/lib/sync/locks/exclusive/spinlock.S b/lib/sync/locks/exclusive/spinlock.S
index 1b49da2..79d19e7 100644
--- a/lib/sync/locks/exclusive/spinlock.S
+++ b/lib/sync/locks/exclusive/spinlock.S
@@ -34,7 +34,7 @@
.section .text, "ax";
-spin_lock:; .type spin_lock, %function
+spin_lock: ; .type spin_lock, %function
mov w2, #1
sevl
l1: wfe
@@ -45,6 +45,6 @@ l2: ldaxr w1, [x0]
ret
-spin_unlock:; .type spin_unlock, %function
+spin_unlock: ; .type spin_unlock, %function
stlr wzr, [x0]
ret
diff --git a/plat/common/aarch64/platform_helpers.S b/plat/common/aarch64/platform_helpers.S
index 6388718..3cea9f6 100644
--- a/plat/common/aarch64/platform_helpers.S
+++ b/plat/common/aarch64/platform_helpers.S
@@ -59,7 +59,7 @@
* SCTLR.C bit e.g. while powering down a cpu
* -----------------------------------------------------
*/
-platform_set_coherent_stack:; .type platform_set_coherent_stack, %function
+platform_set_coherent_stack: ; .type platform_set_coherent_stack, %function
mov x5, x30 // lr
bl platform_get_core_pos
add x0, x0, #1
@@ -76,7 +76,7 @@ platform_set_coherent_stack:; .type platform_set_coherent_stack, %function
* CoreId
* -----------------------------------------------------
*/
-platform_get_core_pos:; .type platform_get_core_pos, %function
+platform_get_core_pos: ; .type platform_get_core_pos, %function
and x1, x0, #MPIDR_CPU_MASK
and x0, x0, #MPIDR_CLUSTER_MASK
add x0, x1, x0, LSR #6
@@ -90,7 +90,7 @@ platform_get_core_pos:; .type platform_get_core_pos, %function
* cpu (applicable ony after a cold boot)
* -----------------------------------------------------
*/
-platform_is_primary_cpu:; .type platform_is_primary_cpu, %function
+platform_is_primary_cpu: ; .type platform_is_primary_cpu, %function
and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
cmp x0, #PRIMARY_CPU
cset x0, eq
@@ -100,7 +100,7 @@ platform_is_primary_cpu:; .type platform_is_primary_cpu, %function
* void platform_get_stack (unsigned long mpidr)
* -----------------------------------------------------
*/
-platform_get_stack:; .type platform_get_stack, %function
+platform_get_stack: ; .type platform_get_stack, %function
mov x10, x30 // lr
bl platform_get_core_pos
add x0, x0, #1
@@ -114,7 +114,7 @@ platform_get_stack:; .type platform_get_stack, %function
* void platform_set_stack (unsigned long mpidr)
* -----------------------------------------------------
*/
-platform_set_stack:; .type platform_set_stack, %function
+platform_set_stack: ; .type platform_set_stack, %function
mov x9, x30 // lr
bl platform_get_stack
mov sp, x0
@@ -125,7 +125,7 @@ platform_set_stack:; .type platform_set_stack, %function
* each platform.
* -----------------------------------------------------
*/
-platform_check_mpidr:; .type platform_check_mpidr, %function
+platform_check_mpidr: ; .type platform_check_mpidr, %function
mov x0, xzr
ret
diff --git a/plat/fvp/aarch64/bl1_plat_helpers.S b/plat/fvp/aarch64/bl1_plat_helpers.S
index f8cfd66..e3cf5c8 100644
--- a/plat/fvp/aarch64/bl1_plat_helpers.S
+++ b/plat/fvp/aarch64/bl1_plat_helpers.S
@@ -60,7 +60,7 @@
* that the request has gone through.
* -----------------------------------------------------
*/
-plat_secondary_cold_boot_setup:; .type plat_secondary_cold_boot_setup, %function
+plat_secondary_cold_boot_setup: ; .type plat_secondary_cold_boot_setup, %function
bl read_mpidr
mov x19, x0
bl platform_get_core_pos
@@ -136,7 +136,7 @@ cb_panic:
* reset all cpus will read the same WK field
* -----------------------------------------------------
*/
-platform_get_entrypoint:; .type platform_get_entrypoint, %function
+platform_get_entrypoint: ; .type platform_get_entrypoint, %function
mov x9, x30 // lr
mov x2, x0
ldr x1, =PWRC_BASE
@@ -176,7 +176,7 @@ _panic: b _panic
* BL1 will always read the mailboxes with the MMU off
* -----------------------------------------------------
*/
-platform_mem_init:; .type platform_mem_init, %function
+platform_mem_init: ; .type platform_mem_init, %function
ldr x0, =TZDRAM_BASE + MBOX_OFF
stp xzr, xzr, [x0, #0]
stp xzr, xzr, [x0, #0x10]
@@ -192,7 +192,7 @@ platform_mem_init:; .type platform_mem_init, %function
* boot to perform early platform initialization
* -----------------------------------------------------
*/
-platform_cold_boot_init:; .type platform_cold_boot_init, %function
+platform_cold_boot_init: ; .type platform_cold_boot_init, %function
mov x20, x0
bl platform_mem_init
bl read_mpidr