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authorAndrew Thoelke <andrew.thoelke@arm.com>2014-05-23 11:00:04 +0100
committerAndrew Thoelke <andrew.thoelke@arm.com>2014-05-23 11:00:04 +0100
commit8957fc76aa58cb66635b872b80e8a44be250a2ba (patch)
tree93bbd8bacfc52aa49f99b26bb55b4b4d74f57559 /services
parent65335d45f513dbe2e4d3677c9a4f491f51d01c24 (diff)
parent445fe84f988f61c01503a12eff591bc97dad06cd (diff)
downloadarm-trusted-firmware-8957fc76aa58cb66635b872b80e8a44be250a2ba.tar.gz
Merge pull request #104 from athoelke:at/tsp-entrypoints-v2
Diffstat (limited to 'services')
-rw-r--r--services/spd/tspd/tspd_main.c16
-rw-r--r--services/spd/tspd/tspd_pm.c16
-rw-r--r--services/spd/tspd/tspd_private.h4
3 files changed, 18 insertions, 18 deletions
diff --git a/services/spd/tspd/tspd_main.c b/services/spd/tspd/tspd_main.c
index ec2d334..1dbe6ba 100644
--- a/services/spd/tspd/tspd_main.c
+++ b/services/spd/tspd/tspd_main.c
@@ -53,10 +53,10 @@
#include "tspd_private.h"
/*******************************************************************************
- * Single structure to hold information about the various entry points into the
- * Secure Payload. It is initialised once on the primary core after a cold boot.
+ * Address of the entrypoint vector table in the Secure Payload. It is
+ * initialised once on the primary core after a cold boot.
******************************************************************************/
-entry_info_t *tsp_entry_info;
+tsp_vectors_t *tsp_vectors;
/*******************************************************************************
* Array to keep track of per-cpu Secure Payload state
@@ -127,7 +127,7 @@ static uint64_t tspd_sel1_interrupt_handler(uint32_t id,
SPSR_64(MODE_EL1, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS));
SMC_SET_EL3(&tsp_ctx->cpu_ctx,
CTX_ELR_EL3,
- (uint64_t) tsp_entry_info->fiq_entry);
+ (uint64_t) &tsp_vectors->fiq_entry);
cm_el1_sysregs_context_restore(SECURE);
cm_set_next_eret_context(SECURE);
@@ -370,8 +370,8 @@ uint64_t tspd_smc_handler(uint32_t smc_fid,
* Stash the SP entry points information. This is done
* only once on the primary cpu
*/
- assert(tsp_entry_info == NULL);
- tsp_entry_info = (entry_info_t *) x1;
+ assert(tsp_vectors == NULL);
+ tsp_vectors = (tsp_vectors_t *) x1;
/*
* SP reports completion. The SPD must have initiated
@@ -465,11 +465,11 @@ uint64_t tspd_smc_handler(uint32_t smc_fid,
*/
if (GET_SMC_TYPE(smc_fid) == SMC_TYPE_FAST) {
cm_set_elr_el3(SECURE, (uint64_t)
- tsp_entry_info->fast_smc_entry);
+ &tsp_vectors->fast_smc_entry);
} else {
set_std_smc_active_flag(tsp_ctx->state);
cm_set_elr_el3(SECURE, (uint64_t)
- tsp_entry_info->std_smc_entry);
+ &tsp_vectors->std_smc_entry);
}
cm_el1_sysregs_context_restore(SECURE);
diff --git a/services/spd/tspd/tspd_pm.c b/services/spd/tspd/tspd_pm.c
index d99aa22..2f20449 100644
--- a/services/spd/tspd/tspd_pm.c
+++ b/services/spd/tspd/tspd_pm.c
@@ -55,11 +55,11 @@ static int32_t tspd_cpu_off_handler(uint64_t cookie)
uint32_t linear_id = platform_get_core_pos(mpidr);
tsp_context_t *tsp_ctx = &tspd_sp_context[linear_id];
- assert(tsp_entry_info);
+ assert(tsp_vectors);
assert(get_tsp_pstate(tsp_ctx->state) == TSP_PSTATE_ON);
/* Program the entry point and enter the TSP */
- cm_set_elr_el3(SECURE, (uint64_t) tsp_entry_info->cpu_off_entry);
+ cm_set_elr_el3(SECURE, (uint64_t) &tsp_vectors->cpu_off_entry);
rc = tspd_synchronous_sp_entry(tsp_ctx);
/*
@@ -89,14 +89,14 @@ static void tspd_cpu_suspend_handler(uint64_t power_state)
uint32_t linear_id = platform_get_core_pos(mpidr);
tsp_context_t *tsp_ctx = &tspd_sp_context[linear_id];
- assert(tsp_entry_info);
+ assert(tsp_vectors);
assert(get_tsp_pstate(tsp_ctx->state) == TSP_PSTATE_ON);
/* Program the entry point, power_state parameter and enter the TSP */
write_ctx_reg(get_gpregs_ctx(&tsp_ctx->cpu_ctx),
CTX_GPREG_X0,
power_state);
- cm_set_elr_el3(SECURE, (uint64_t) tsp_entry_info->cpu_suspend_entry);
+ cm_set_elr_el3(SECURE, (uint64_t) &tsp_vectors->cpu_suspend_entry);
rc = tspd_synchronous_sp_entry(tsp_ctx);
/*
@@ -123,11 +123,11 @@ static void tspd_cpu_on_finish_handler(uint64_t cookie)
uint32_t linear_id = platform_get_core_pos(mpidr);
tsp_context_t *tsp_ctx = &tspd_sp_context[linear_id];
- assert(tsp_entry_info);
+ assert(tsp_vectors);
assert(get_tsp_pstate(tsp_ctx->state) == TSP_PSTATE_OFF);
/* Initialise this cpu's secure context */
- tspd_init_secure_context((uint64_t) tsp_entry_info->cpu_on_entry,
+ tspd_init_secure_context((uint64_t) &tsp_vectors->cpu_on_entry,
TSP_AARCH64,
mpidr,
tsp_ctx);
@@ -158,14 +158,14 @@ static void tspd_cpu_suspend_finish_handler(uint64_t suspend_level)
uint32_t linear_id = platform_get_core_pos(mpidr);
tsp_context_t *tsp_ctx = &tspd_sp_context[linear_id];
- assert(tsp_entry_info);
+ assert(tsp_vectors);
assert(get_tsp_pstate(tsp_ctx->state) == TSP_PSTATE_SUSPEND);
/* Program the entry point, suspend_level and enter the SP */
write_ctx_reg(get_gpregs_ctx(&tsp_ctx->cpu_ctx),
CTX_GPREG_X0,
suspend_level);
- cm_set_elr_el3(SECURE, (uint64_t) tsp_entry_info->cpu_resume_entry);
+ cm_set_elr_el3(SECURE, (uint64_t) &tsp_vectors->cpu_resume_entry);
rc = tspd_synchronous_sp_entry(tsp_ctx);
/*
diff --git a/services/spd/tspd/tspd_private.h b/services/spd/tspd/tspd_private.h
index 7395bb9..fbb0388 100644
--- a/services/spd/tspd/tspd_private.h
+++ b/services/spd/tspd/tspd_private.h
@@ -183,7 +183,7 @@ extern const spd_pm_ops_t tspd_pm;
/*******************************************************************************
* Forward declarations
******************************************************************************/
-struct entry_info;
+struct tsp_vectors;
/*******************************************************************************
* Function & Data prototypes
@@ -197,7 +197,7 @@ extern int32_t tspd_init_secure_context(uint64_t entrypoint,
uint64_t mpidr,
tsp_context_t *tsp_ctx);
extern tsp_context_t tspd_sp_context[TSPD_CORE_COUNT];
-extern struct entry_info *tsp_entry_info;
+extern struct tsp_vectors *tsp_vectors;
#endif /*__ASSEMBLY__*/
#endif /* __TSPD_PRIVATE_H__ */