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authorSandrine Bailleux <sandrine.bailleux@arm.com>2014-03-31 11:25:18 +0100
committerSandrine Bailleux <sandrine.bailleux@arm.com>2014-04-08 15:22:56 +0100
commit9e86490f8f14f25c7583aaf37412114219f3eb8e (patch)
tree97f364c0c7d33077fccaa737b806617bc9fc491b /plat
parent65a9c0e96a9fe033936f40b7603e0ae267b97d96 (diff)
downloadarm-trusted-firmware-9e86490f8f14f25c7583aaf37412114219f3eb8e.tar.gz
Define frequency of system counter in platform code
BL3-1 architecture setup code programs the system counter frequency into the CNTFRQ_EL0 register. This frequency is defined by the platform, though. This patch introduces a new platform hook that the architecture setup code can call to retrieve this information. In the ARM FVP port, this returns the first entry of the frequency modes table from the memory mapped generic timer. All system counter setup code has been removed from BL1 as some platforms may not have initialized the system counters at this stage. The platform specific settings done exclusively in BL1 have been moved to BL3-1. In the ARM FVP port, this consists in enabling and initializing the System level generic timer. Also, the frequency change request in the counter control register has been set to 0 to make it explicit it's using the base frequency. The CNTCR_FCREQ() macro has been fixed in this context to give an entry number rather than a bitmask. In future, when support for firmware update is implemented, there is a case where BL1 platform specific code will need to program the counter frequency. This should be implemented at that time. This patch also updates the relevant documentation. It properly fixes ARM-software/tf-issues#24 Change-Id: If95639b279f75d66ac0576c48a6614b5ccb0e84b
Diffstat (limited to 'plat')
-rw-r--r--plat/fvp/aarch64/plat_common.c13
-rw-r--r--plat/fvp/bl1_plat_setup.c3
-rw-r--r--plat/fvp/bl31_plat_setup.c5
-rw-r--r--plat/fvp/platform.h1
4 files changed, 18 insertions, 4 deletions
diff --git a/plat/fvp/aarch64/plat_common.c b/plat/fvp/aarch64/plat_common.c
index d44ccb6..a5d9f1d 100644
--- a/plat/fvp/aarch64/plat_common.c
+++ b/plat/fvp/aarch64/plat_common.c
@@ -248,3 +248,16 @@ unsigned long plat_get_ns_image_entrypoint(void)
{
return NS_IMAGE_OFFSET;
}
+
+uint64_t plat_get_syscnt_freq(void)
+{
+ uint64_t counter_base_frequency;
+
+ /* Read the frequency from Frequency modes table */
+ counter_base_frequency = mmio_read_32(SYS_CNTCTL_BASE + CNTFID_OFF);
+
+ /* The first entry of the frequency modes table must not be 0 */
+ assert(counter_base_frequency != 0);
+
+ return counter_base_frequency;
+}
diff --git a/plat/fvp/bl1_plat_setup.c b/plat/fvp/bl1_plat_setup.c
index d4fd81b..67694f4 100644
--- a/plat/fvp/bl1_plat_setup.c
+++ b/plat/fvp/bl1_plat_setup.c
@@ -114,9 +114,6 @@ void bl1_platform_setup(void)
{
/* Initialise the IO layer and register platform IO devices */
io_setup();
-
- /* Enable and initialize the System level generic timer */
- mmio_write_32(SYS_CNTCTL_BASE + CNTCR_OFF, CNTCR_EN);
}
diff --git a/plat/fvp/bl31_plat_setup.c b/plat/fvp/bl31_plat_setup.c
index 07987e4..9bf83eb 100644
--- a/plat/fvp/bl31_plat_setup.c
+++ b/plat/fvp/bl31_plat_setup.c
@@ -29,9 +29,9 @@
*/
#include <platform.h>
+#include <arch.h>
#include <fvp_pwrc.h>
#include <console.h>
-#include <bl_common.h>
/*******************************************************************************
* Declarations of linker defined symbols which will help us find the layout
@@ -141,6 +141,9 @@ void bl31_platform_setup()
mmio_write_32(VE_SYSREGS_BASE + V2M_SYS_CFGCTRL,
(1ull << 31) | (1 << 30) | (7 << 20) | (0 << 16));
+ /* Enable and initialize the System level generic timer */
+ mmio_write_32(SYS_CNTCTL_BASE + CNTCR_OFF, CNTCR_FCREQ(0) | CNTCR_EN);
+
/* Allow access to the System counter timer module */
reg_val = (1 << CNTACR_RPCT_SHIFT) | (1 << CNTACR_RVCT_SHIFT);
reg_val |= (1 << CNTACR_RFRQ_SHIFT) | (1 << CNTACR_RVOFF_SHIFT);
diff --git a/plat/fvp/platform.h b/plat/fvp/platform.h
index 53f14aa..5f4adc3 100644
--- a/plat/fvp/platform.h
+++ b/plat/fvp/platform.h
@@ -346,6 +346,7 @@ extern int platform_config_setup(void);
extern void plat_report_exception(unsigned long);
extern unsigned long plat_get_ns_image_entrypoint(void);
extern unsigned long platform_get_stack(unsigned long mpidr);
+extern uint64_t plat_get_syscnt_freq(void);
/* Declarations for fvp_gic.c */
extern void gic_cpuif_deactivate(unsigned int);