aboutsummaryrefslogtreecommitdiff
path: root/plat/fvp/bl31_plat_setup.c
diff options
context:
space:
mode:
authorDan Handley <dan.handley@arm.com>2014-05-15 14:53:30 +0100
committerAchin Gupta <achin.gupta@arm.com>2014-05-23 18:01:41 +0100
commit17a387ad5af5beacd8406f3f35cbf697e4ac3698 (patch)
tree8ed146cf7424498872c599401d264e29a3343128 /plat/fvp/bl31_plat_setup.c
parentdec5e0d1da9fdfe68cea4fbeb096f93e43860493 (diff)
downloadarm-trusted-firmware-17a387ad5af5beacd8406f3f35cbf697e4ac3698.tar.gz
Rename FVP specific files and functions
FVP specific files and functions containing the word "plat" have been renamed to use the word "fvp" to distinguish them from the common platform functionality and porting functions. Change-Id: I39f9673dab3ee9c74bd18b3e62b7c21027232f7d
Diffstat (limited to 'plat/fvp/bl31_plat_setup.c')
-rw-r--r--plat/fvp/bl31_plat_setup.c256
1 files changed, 0 insertions, 256 deletions
diff --git a/plat/fvp/bl31_plat_setup.c b/plat/fvp/bl31_plat_setup.c
deleted file mode 100644
index d1e16bd..0000000
--- a/plat/fvp/bl31_plat_setup.c
+++ /dev/null
@@ -1,256 +0,0 @@
-/*
- * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * Neither the name of ARM nor the names of its contributors may be used
- * to endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <arch.h>
-#include <arch_helpers.h>
-#include <assert.h>
-#include <bl_common.h>
-#include <bl31.h>
-#include <console.h>
-#include <mmio.h>
-#include <platform.h>
-#include <stddef.h>
-#include "drivers/pwrc/fvp_pwrc.h"
-#include "fvp_def.h"
-#include "fvp_private.h"
-
-/*******************************************************************************
- * Declarations of linker defined symbols which will help us find the layout
- * of trusted SRAM
- ******************************************************************************/
-extern unsigned long __RO_START__;
-extern unsigned long __RO_END__;
-
-extern unsigned long __COHERENT_RAM_START__;
-extern unsigned long __COHERENT_RAM_END__;
-
-/*
- * The next 2 constants identify the extents of the code & RO data region.
- * These addresses are used by the MMU setup code and therefore they must be
- * page-aligned. It is the responsibility of the linker script to ensure that
- * __RO_START__ and __RO_END__ linker symbols refer to page-aligned addresses.
- */
-#define BL31_RO_BASE (unsigned long)(&__RO_START__)
-#define BL31_RO_LIMIT (unsigned long)(&__RO_END__)
-
-/*
- * The next 2 constants identify the extents of the coherent memory region.
- * These addresses are used by the MMU setup code and therefore they must be
- * page-aligned. It is the responsibility of the linker script to ensure that
- * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols
- * refer to page-aligned addresses.
- */
-#define BL31_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
-#define BL31_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
-
-
-#if RESET_TO_BL31
-static entry_point_info_t bl32_entrypoint_info;
-static entry_point_info_t bl33_entrypoint_info;
-#else
-/*******************************************************************************
- * Reference to structure which holds the arguments that have been passed to
- * BL31 from BL2.
- ******************************************************************************/
-static bl31_params_t *bl2_to_bl31_params;
-#endif
-
-/*******************************************************************************
- * Return a pointer to the 'entry_point_info' structure of the next image for the
- * security state specified. BL33 corresponds to the non-secure image type
- * while BL32 corresponds to the secure image type. A NULL pointer is returned
- * if the image does not exist.
- ******************************************************************************/
-entry_point_info_t *bl31_get_next_image_info(uint32_t type)
-{
- entry_point_info_t *next_image_info;
-
-#if RESET_TO_BL31
-
- if (type == NON_SECURE)
- plat_get_entry_point_info(NON_SECURE, &bl33_entrypoint_info);
- else
- plat_get_entry_point_info(SECURE, &bl32_entrypoint_info);
-
- next_image_info = (type == NON_SECURE) ?
- &bl33_entrypoint_info :
- &bl32_entrypoint_info;
-#else
- next_image_info = (type == NON_SECURE) ?
- bl2_to_bl31_params->bl33_ep_info :
- bl2_to_bl31_params->bl32_ep_info;
-#endif
-
-
- /* None of the images on this platform can have 0x0 as the entrypoint */
- if (next_image_info->pc)
- return next_image_info;
- else
- return NULL;
-}
-
-/*******************************************************************************
- * Perform any BL31 specific platform actions. Here is an opportunity to copy
- * parameters passed by the calling EL (S-EL1 in BL2 & S-EL3 in BL1) before they
- * are lost (potentially). This needs to be done before the MMU is initialized
- * so that the memory layout can be used while creating page tables. On the FVP
- * we know that BL2 has populated the parameters in secure DRAM. So we just use
- * the reference passed in 'from_bl2' instead of copying. The 'data' parameter
- * is not used since all the information is contained in 'from_bl2'. Also, BL2
- * has flushed this information to memory, so we are guaranteed to pick up good
- * data
- ******************************************************************************/
-void bl31_early_platform_setup(bl31_params_t *from_bl2,
- void *plat_params_from_bl2)
-{
- /* Initialize the console to provide early debug support */
- console_init(PL011_UART0_BASE);
-
- /* Initialize the platform config for future decision making */
- platform_config_setup();
-
-#if RESET_TO_BL31
- /* There are no parameters from BL2 if BL31 is a reset vector */
- assert(from_bl2 == NULL);
- assert(plat_params_from_bl2 == NULL);
-
-
- /*
- * Do initial security configuration to allow DRAM/device access. On
- * Base FVP only DRAM security is programmable (via TrustZone), but
- * other platforms might have more programmable security devices
- * present.
- */
- plat_security_setup();
-#else
- /* Check params passed from BL2 should not be NULL,
- * We are not checking plat_params_from_bl2 as NULL as we are not
- * using it on FVP
- */
- assert(from_bl2 != NULL);
- assert(from_bl2->h.type == PARAM_BL31);
- assert(from_bl2->h.version >= VERSION_1);
-
- bl2_to_bl31_params = from_bl2;
-#endif
-}
-
-/*******************************************************************************
- * Initialize the gic, configure the CLCD and zero out variables needed by the
- * secondaries to boot up correctly.
- ******************************************************************************/
-void bl31_platform_setup()
-{
- unsigned int reg_val;
-
- /* Initialize the gic cpu and distributor interfaces */
- gic_setup();
-
- /*
- * TODO: Configure the CLCD before handing control to
- * linux. Need to see if a separate driver is needed
- * instead.
- */
- mmio_write_32(VE_SYSREGS_BASE + V2M_SYS_CFGDATA, 0);
- mmio_write_32(VE_SYSREGS_BASE + V2M_SYS_CFGCTRL,
- (1ull << 31) | (1 << 30) | (7 << 20) | (0 << 16));
-
- /* Enable and initialize the System level generic timer */
- mmio_write_32(SYS_CNTCTL_BASE + CNTCR_OFF, CNTCR_FCREQ(0) | CNTCR_EN);
-
- /* Allow access to the System counter timer module */
- reg_val = (1 << CNTACR_RPCT_SHIFT) | (1 << CNTACR_RVCT_SHIFT);
- reg_val |= (1 << CNTACR_RFRQ_SHIFT) | (1 << CNTACR_RVOFF_SHIFT);
- reg_val |= (1 << CNTACR_RWVT_SHIFT) | (1 << CNTACR_RWPT_SHIFT);
- mmio_write_32(SYS_TIMCTL_BASE + CNTACR_BASE(0), reg_val);
- mmio_write_32(SYS_TIMCTL_BASE + CNTACR_BASE(1), reg_val);
-
- reg_val = (1 << CNTNSAR_NS_SHIFT(0)) | (1 << CNTNSAR_NS_SHIFT(1));
- mmio_write_32(SYS_TIMCTL_BASE + CNTNSAR, reg_val);
-
- /* Intialize the power controller */
- fvp_pwrc_setup();
-
- /* Topologies are best known to the platform. */
- plat_setup_topology();
-}
-
-/*******************************************************************************
- * Perform the very early platform specific architectural setup here. At the
- * moment this is only intializes the mmu in a quick and dirty way.
- ******************************************************************************/
-void bl31_plat_arch_setup()
-{
-#if RESET_TO_BL31
- fvp_cci_setup();
-#endif
-
- configure_mmu_el3(BL31_RO_BASE,
- (BL31_COHERENT_RAM_LIMIT - BL31_RO_BASE),
- BL31_RO_BASE,
- BL31_RO_LIMIT,
- BL31_COHERENT_RAM_BASE,
- BL31_COHERENT_RAM_LIMIT);
-}
-
-#if RESET_TO_BL31
-/*******************************************************************************
- * Generate the entry point info for Non Secure and Secure images
- * for transferring control from BL31
- ******************************************************************************/
-void plat_get_entry_point_info(unsigned long target_security,
- entry_point_info_t *target_entry_info)
-{
- if (target_security == NON_SECURE) {
- SET_PARAM_HEAD(target_entry_info,
- PARAM_EP,
- VERSION_1,
- 0);
- /*
- * Tell BL31 where the non-trusted software image
- * is located and the entry state information
- */
- target_entry_info->pc = plat_get_ns_image_entrypoint();
-
- fvp_set_bl33_ep_info(target_entry_info);
-
- } else {
- SET_PARAM_HEAD(target_entry_info,
- PARAM_EP,
- VERSION_1,
- 0);
- if (BL32_BASE != 0) {
- /* Hard coding entry point to the base of the BL32 */
- target_entry_info->pc = BL32_BASE;
- fvp_set_bl32_ep_info(target_entry_info);
- }
- }
-}
-#endif