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authorAndrew Thoelke <andrew.thoelke@arm.com>2014-03-18 13:46:55 +0000
committerAndrew Thoelke <andrew.thoelke@arm.com>2014-03-26 21:54:37 +0000
commit0a30cf54af7bb1f77b405062b1d5b44e809d0290 (patch)
tree9b7acf35e8b41803fb7a836dce428a9924ba1587 /plat/common
parentdccc537a7243d784e0b8b81ce1634e385c3b048b (diff)
downloadarm-trusted-firmware-0a30cf54af7bb1f77b405062b1d5b44e809d0290.tar.gz
Place assembler functions in separate sections
This extends the --gc-sections behaviour to the many assembler support functions in the firmware images by placing each function into its own code section. This is achieved by creating a 'func' macro used to declare each function label. Fixes ARM-software/tf-issues#80 Change-Id: I301937b630add292d2dec6d2561a7fcfa6fec690
Diffstat (limited to 'plat/common')
-rw-r--r--plat/common/aarch64/platform_helpers.S17
1 files changed, 8 insertions, 9 deletions
diff --git a/plat/common/aarch64/platform_helpers.S b/plat/common/aarch64/platform_helpers.S
index 563f198..50abb70 100644
--- a/plat/common/aarch64/platform_helpers.S
+++ b/plat/common/aarch64/platform_helpers.S
@@ -30,6 +30,7 @@
#include <arch.h>
#include <platform.h>
+#include <asm_macros.S>
.globl pcpu_dv_mem_stack
@@ -51,8 +52,6 @@
#define PCPU_DV_MEM_STACK_SIZE 0x300
#endif
- .section .text, "ax"; .align 3
-
/* -----------------------------------------------------
* unsigned long long platform_set_coherent_stack
* (unsigned mpidr);
@@ -62,7 +61,7 @@
* SCTLR.C bit e.g. while powering down a cpu
* -----------------------------------------------------
*/
-platform_set_coherent_stack: ; .type platform_set_coherent_stack, %function
+func platform_set_coherent_stack
mov x5, x30 // lr
bl platform_get_core_pos
add x0, x0, #1
@@ -79,7 +78,7 @@ platform_set_coherent_stack: ; .type platform_set_coherent_stack, %function
* CoreId
* -----------------------------------------------------
*/
-platform_get_core_pos: ; .type platform_get_core_pos, %function
+func platform_get_core_pos
and x1, x0, #MPIDR_CPU_MASK
and x0, x0, #MPIDR_CLUSTER_MASK
add x0, x1, x0, LSR #6
@@ -93,7 +92,7 @@ platform_get_core_pos: ; .type platform_get_core_pos, %function
* cpu (applicable ony after a cold boot)
* -----------------------------------------------------
*/
-platform_is_primary_cpu: ; .type platform_is_primary_cpu, %function
+func platform_is_primary_cpu
and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
cmp x0, #PRIMARY_CPU
cset x0, eq
@@ -103,7 +102,7 @@ platform_is_primary_cpu: ; .type platform_is_primary_cpu, %function
* void platform_get_stack (unsigned long mpidr)
* -----------------------------------------------------
*/
-platform_get_stack: ; .type platform_get_stack, %function
+func platform_get_stack
mov x10, x30 // lr
bl platform_get_core_pos
add x0, x0, #1
@@ -117,7 +116,7 @@ platform_get_stack: ; .type platform_get_stack, %function
* void platform_set_stack (unsigned long mpidr)
* -----------------------------------------------------
*/
-platform_set_stack: ; .type platform_set_stack, %function
+func platform_set_stack
mov x9, x30 // lr
bl platform_get_stack
mov sp, x0
@@ -128,7 +127,7 @@ platform_set_stack: ; .type platform_set_stack, %function
* each platform.
* -----------------------------------------------------
*/
-platform_check_mpidr: ; .type platform_check_mpidr, %function
+func platform_check_mpidr
mov x0, xzr
ret
@@ -137,7 +136,7 @@ platform_check_mpidr: ; .type platform_check_mpidr, %function
* each platform.
* -----------------------------------------------------
*/
-plat_report_exception:
+func plat_report_exception
ret
/* -----------------------------------------------------