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authorAndrew Thoelke <andrew.thoelke@arm.com>2014-06-02 15:44:43 +0100
committerAndrew Thoelke <andrew.thoelke@arm.com>2014-06-10 15:26:14 +0100
commit5c3272a717f357872973c78007b659dca0e5c673 (patch)
treeb824bb33492c50c7d2d001346cb2d29966e99d38 /lib/aarch64/cache_helpers.S
parent977fbcd4e0842e590a961d6f40c14653caa9301a (diff)
downloadarm-trusted-firmware-5c3272a717f357872973c78007b659dca0e5c673.tar.gz
Make system register functions inline assembly
Replace the current out-of-line assembler implementations of the system register and system instruction operations with inline assembler. This enables better compiler optimisation and code generation when accessing system registers. Fixes ARM-software/tf-issues#91 Change-Id: I149af3a94e1e5e5140a3e44b9abfc37ba2324476
Diffstat (limited to 'lib/aarch64/cache_helpers.S')
-rw-r--r--lib/aarch64/cache_helpers.S48
1 files changed, 0 insertions, 48 deletions
diff --git a/lib/aarch64/cache_helpers.S b/lib/aarch64/cache_helpers.S
index a5b918c..1c80550 100644
--- a/lib/aarch64/cache_helpers.S
+++ b/lib/aarch64/cache_helpers.S
@@ -31,59 +31,11 @@
#include <arch.h>
#include <asm_macros.S>
- .globl dcisw
- .globl dccisw
- .globl dccsw
- .globl dccvac
- .globl dcivac
- .globl dccivac
- .globl dccvau
- .globl dczva
.globl flush_dcache_range
.globl inv_dcache_range
.globl dcsw_op_louis
.globl dcsw_op_all
-func dcisw
- dc isw, x0
- ret
-
-
-func dccisw
- dc cisw, x0
- ret
-
-
-func dccsw
- dc csw, x0
- ret
-
-
-func dccvac
- dc cvac, x0
- ret
-
-
-func dcivac
- dc ivac, x0
- ret
-
-
-func dccivac
- dc civac, x0
- ret
-
-
-func dccvau
- dc cvau, x0
- ret
-
-
-func dczva
- dc zva, x0
- ret
-
-
/* ------------------------------------------
* Clean+Invalidate from base address till
* size. 'x0' = addr, 'x1' = size