path: root/fdts/fvp-base-gicv2-psci.dtb
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authorVikram Kanigiri <vikram.kanigiri@arm.com>2014-04-24 11:02:16 +0100
committerVikram Kanigiri <vikram.kanigiri@arm.com>2014-05-22 16:25:09 +0100
commitdbad1bacba0a7adfd3c7c559f0fd0805087aeddd (patch)
tree89884033b665aeca41682ddb79f76006d0429c85 /fdts/fvp-base-gicv2-psci.dtb
parent6871c5d3a227cb95008a25e90e358ec0ac615222 (diff)
Add support for BL3-1 as a reset vector
This change adds optional reset vector support to BL3-1 which means BL3-1 entry point can detect cold/warm boot, initialise primary cpu, set up cci and mail box. When using BL3-1 as a reset vector it is assumed that the BL3-1 platform code can determine the location of the BL3-2 images, or load them as there are no parameters that can be passed to BL3-1 at reset. It also fixes the incorrect initialisation of mailbox registers on the FVP platform This feature can be enabled by building the code with make variable RESET_TO_BL31 set as 1 Fixes ARM-software/TF-issues#133 Fixes ARM-software/TF-issues#20 Change-Id: I4e23939b1c518614b899f549f1e8d412538ee570
Diffstat (limited to 'fdts/fvp-base-gicv2-psci.dtb')
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