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authorSandrine Bailleux <sandrine.bailleux@arm.com>2014-05-20 17:22:24 +0100
committerSandrine Bailleux <sandrine.bailleux@arm.com>2014-05-22 17:30:58 +0100
commit2467f70fde43fefa38564d871e78f1f882dfe540 (patch)
tree603dd1fc5583f51a9c83ba633ed8a1866629e627 /docs
parentdbad1bacba0a7adfd3c7c559f0fd0805087aeddd (diff)
downloadarm-trusted-firmware-2467f70fde43fefa38564d871e78f1f882dfe540.tar.gz
TSP: Let the platform decide which secure memory to use
The TSP's linker script used to assume that the TSP would execute from secure DRAM. Although it is currently the case on FVPs, platforms are free to use any secure memory they wish. This patch introduces the flexibility to load the TSP into any secure memory. The platform code gets to specify the extents of this memory in the platform header file, as well as the BL3-2 image limit address. The latter definition allows to check in a generic way that the BL3-2 image fits in its bounds. Change-Id: I9450f2d8b32d74bd00b6ce57a0a1542716ab449c
Diffstat (limited to 'docs')
-rw-r--r--docs/porting-guide.md27
1 files changed, 27 insertions, 0 deletions
diff --git a/docs/porting-guide.md b/docs/porting-guide.md
index 721ba1b..c66279c 100644
--- a/docs/porting-guide.md
+++ b/docs/porting-guide.md
@@ -191,9 +191,36 @@ constants defined. In the ARM FVP port, this file is found in
image. Must be aligned on a page-size boundary.
* **#define : NS_IMAGE_OFFSET**
+
Defines the base address in non-secure DRAM where BL2 loads the BL3-3 binary
image. Must be aligned on a page-size boundary.
+If the BL3-2 image is supported by the platform, the following constants must
+be defined as well:
+
+* **#define : TSP_SEC_MEM_BASE**
+
+ Defines the base address of the secure memory used by the BL3-2 image on the
+ platform.
+
+* **#define : TSP_SEC_MEM_SIZE**
+
+ Defines the size of the secure memory used by the BL3-2 image on the
+ platform.
+
+* **#define : BL32_BASE**
+
+ Defines the base address in secure memory where BL2 loads the BL3-2 binary
+ image. Must be inside the secure memory identified by `TSP_SEC_MEM_BASE` and
+ `TSP_SEC_MEM_SIZE` constants. Must also be aligned on a page-size boundary.
+
+* **#define : BL32_LIMIT**
+
+ Defines the maximum address that the BL3-2 image can occupy. Must be inside
+ the secure memory identified by `TSP_SEC_MEM_BASE` and `TSP_SEC_MEM_SIZE`
+ constants.
+
+
### File : platform_macros.S [mandatory]
Each platform must export a file of this name with the following