|author||Achin Gupta <email@example.com>||2013-11-25 18:45:02 +0000|
|committer||Dan Handley <firstname.lastname@example.org>||2013-12-05 12:28:50 +0000|
psci: fix error due to a non zero context id
In the previous psci implementation, the psci_afflvl_power_on_finish() function would run into an error condition if the value of the context id parameter in the cpu_on and cpu_suspend psci calls was != 0. The parameter was being restored as the return value of the affinity level 0 finisher function. A non zero context id would be treated as an error condition. This would prevent successful wake up of the cpu from a power down state. Also, the contents of the general purpose registers were not being cleared upon return to the non-secure world after a cpu power up. This could potentially allow the non-secure world to view secure data. This patch ensures that all general purpose registers are set to ~0 prior to the final eret that drops the execution to the non-secure world. The context id is used to initialize the general purpose register x0 prior to re-entry into the non-secure world and is no longer restored as a function return value. A platform helper (platform_get_stack()) has been introduced to facilitate this change. Change-Id: I2454911ffd75705d6aa8609a5d250d9b26fa097c
Diffstat (limited to 'docs/change-log.md')
1 files changed, 4 insertions, 0 deletions
diff --git a/docs/change-log.md b/docs/change-log.md
index 73d7e7a..8be7a51 100644
@@ -52,6 +52,10 @@ Detailed changes since last release
* Definitions of some constants related to the PSCI api calls AFFINITY_INFO
and CPU_SUSPEND have been corrected.
+* A bug which triggered an error condition in the code executed after a cpu
+ is powered on, if a non zero context id parameter was passed in the PSCI
+ CPU_ON and CPU_SUSPEND api calls has been corrected.
ARM Trusted Firmware - version 0.2