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authorSandrine Bailleux <sandrine.bailleux@arm.com>2013-11-18 17:26:59 +0000
committerDan Handley <dan.handley@arm.com>2013-11-27 15:31:06 +0000
commit3738274dc1b40ad846d41d7bfd6a597bcfba9e70 (patch)
tree136c4d81d7b4f285ee37f1fdf674df5332a238d4 /common
parent204aa03da7d8a34d5e06fba3ccc9e565ed01d305 (diff)
downloadarm-trusted-firmware-3738274dc1b40ad846d41d7bfd6a597bcfba9e70.tar.gz
Unmask SError and Debug exceptions.
Any asynchronous exception caused by the firmware should be handled in the firmware itself. For this reason, unmask SError exceptions (and Debug ones as well) on all boot paths. Also route external abort and SError interrupts to EL3, otherwise they will target EL1. Change-Id: I9c191d2d0dcfef85f265641c8460dfbb4d112092
Diffstat (limited to 'common')
-rw-r--r--common/psci/psci_afflvl_suspend.c3
-rw-r--r--common/psci/psci_private.h1
2 files changed, 4 insertions, 0 deletions
diff --git a/common/psci/psci_afflvl_suspend.c b/common/psci/psci_afflvl_suspend.c
index 030f15d..9a2c0cf 100644
--- a/common/psci/psci_afflvl_suspend.c
+++ b/common/psci/psci_afflvl_suspend.c
@@ -82,6 +82,8 @@ static int psci_afflvl0_suspend(unsigned long mpidr,
psci_secure_context[index].tcr = read_tcr();
psci_secure_context[index].ttbr = read_ttbr0();
psci_secure_context[index].vbar = read_vbar();
+ psci_secure_context[index].pstate =
+ read_daif() & (DAIF_ABT_BIT | DAIF_DBG_BIT);
/* Set the secure world (EL3) re-entry point after BL1 */
psci_entrypoint = (unsigned long) psci_aff_suspend_finish_entry;
@@ -370,6 +372,7 @@ static unsigned int psci_afflvl0_suspend_finish(unsigned long mpidr,
* context in the right order.
*/
write_vbar(psci_secure_context[index].vbar);
+ write_daif(read_daif() | psci_secure_context[index].pstate);
write_mair(psci_secure_context[index].mair);
write_tcr(psci_secure_context[index].tcr);
write_ttbr0(psci_secure_context[index].ttbr);
diff --git a/common/psci/psci_private.h b/common/psci/psci_private.h
index 48d40d0..6505adf 100644
--- a/common/psci/psci_private.h
+++ b/common/psci/psci_private.h
@@ -64,6 +64,7 @@ typedef struct {
unsigned long tcr;
unsigned long ttbr;
unsigned long vbar;
+ unsigned long pstate;
} secure_context;
/*******************************************************************************