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authorSoby Mathew <soby.mathew@arm.com>2014-04-30 15:36:37 +0100
committerSoby Mathew <soby.mathew@arm.com>2014-05-08 12:01:23 +0100
commitc3260f9b82c5017ca078f090c03cd7135ee8f8c9 (patch)
tree066308ed69c8a6bd421f5ad43458f3fe184f59f3 /bl31/bl31_main.c
parente404d7f44a190b82332bb96daffa0c6239732218 (diff)
downloadarm-trusted-firmware-c3260f9b82c5017ca078f090c03cd7135ee8f8c9.tar.gz
Preserve x19-x29 across world switch for exception handling
Previously exception handlers in BL3-1, X19-X29 were not saved and restored on every SMC/trap into EL3. Instead these registers were 'saved as needed' as a side effect of the A64 ABI used by the C compiler. That approach failed when world switching but was not visible with the TSP/TSPD code because the TSP is 64-bit, did not clobber these registers when running and did not support pre-emption by normal world interrupts. These scenarios showed that the values in these registers can be passed through a world switch, which broke the normal and trusted world assumptions about these registers being preserved. The Ideal solution saves and restores these registers when a world switch occurs - but that type of implementation is more complex. So this patch always saves and restores these registers on entry and exit of EL3. Fixes ARM-software/tf-issues#141 Change-Id: I9a727167bbc594454e81cf78a97ca899dfb11c27
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