aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authordanh-arm <dan.handley@arm.com>2014-05-08 12:00:10 +0100
committerdanh-arm <dan.handley@arm.com>2014-05-08 12:00:10 +0100
commit8067ae3ff63c258df753b893eabfe4c8a852bd8a (patch)
tree540c27eef13eb6ba5b6b451742f6cfb199dc9ddb
parenta1ec2f4c9aa089fe938b8d233ebd18c389cbad78 (diff)
parent228a9f0b443196a9172f89facdd8a40ea43767a2 (diff)
downloadarm-trusted-firmware-8067ae3ff63c258df753b893eabfe4c8a852bd8a.tar.gz
Merge pull request #61 from athoelke/use-mrs-msr-from-assembler-v2
Use MRS/MSR instructions in assembler code v2
-rw-r--r--bl1/aarch64/bl1_entrypoint.S4
-rw-r--r--bl1/aarch64/bl1_exceptions.S10
-rw-r--r--bl2/aarch64/bl2_entrypoint.S7
-rw-r--r--bl31/aarch64/bl31_entrypoint.S7
-rw-r--r--include/common/asm_macros.S2
-rw-r--r--include/lib/aarch64/arch_helpers.h5
-rw-r--r--lib/aarch64/cpu_helpers.S10
-rw-r--r--lib/aarch64/misc_helpers.S44
-rw-r--r--lib/aarch64/sysreg_helpers.S40
-rw-r--r--plat/fvp/aarch64/bl1_plat_helpers.S7
-rw-r--r--services/std_svc/psci/psci_entry.S13
11 files changed, 26 insertions, 123 deletions
diff --git a/bl1/aarch64/bl1_entrypoint.S b/bl1/aarch64/bl1_entrypoint.S
index e25386f..c081af4 100644
--- a/bl1/aarch64/bl1_entrypoint.S
+++ b/bl1/aarch64/bl1_entrypoint.S
@@ -97,10 +97,10 @@ _wait_for_entrypoint:
* their turn to be woken up
* ---------------------------------------------
*/
- bl read_mpidr
+ mrs x0, mpidr_el1
bl platform_get_entrypoint
cbnz x0, _do_warm_boot
- bl read_mpidr
+ mrs x0, mpidr_el1
bl platform_is_primary_cpu
cbnz x0, _do_cold_boot
diff --git a/bl1/aarch64/bl1_exceptions.S b/bl1/aarch64/bl1_exceptions.S
index 71fd4cd..a87b20f 100644
--- a/bl1/aarch64/bl1_exceptions.S
+++ b/bl1/aarch64/bl1_exceptions.S
@@ -189,7 +189,7 @@ func process_exception
mov x0, #SYNC_EXCEPTION_AARCH64
bl plat_report_exception
- bl read_esr_el3
+ mrs x0, esr_el3
ubfx x1, x0, #ESR_EC_SHIFT, #ESR_EC_LENGTH
cmp x1, #EC_AARCH64_SMC
b.ne panic
@@ -201,10 +201,8 @@ func process_exception
mov x2, x3
mov x3, x4
bl display_boot_progress
- mov x0, x20
- bl write_elr
- mov x0, x21
- bl write_spsr
+ msr elr_el3, x20
+ msr spsr_el3, x21
ubfx x0, x21, #MODE_EL_SHIFT, #2
cmp x0, #MODE_EL3
b.ne skip_mmu_teardown
@@ -216,7 +214,7 @@ func process_exception
* ---------------------------------------------
*/
bl disable_mmu_icache_el3
- bl tlbialle3
+ tlbi alle3
skip_mmu_teardown:
ldp x6, x7, [sp, #0x30]
ldp x4, x5, [sp, #0x20]
diff --git a/bl2/aarch64/bl2_entrypoint.S b/bl2/aarch64/bl2_entrypoint.S
index cd07aa9..4f7565f 100644
--- a/bl2/aarch64/bl2_entrypoint.S
+++ b/bl2/aarch64/bl2_entrypoint.S
@@ -54,8 +54,7 @@ func bl2_entrypoint
* So, make sure no secondary has lost its way.
* ---------------------------------------------
*/
- bl read_mpidr
- mov x19, x0
+ mrs x0, mpidr_el1
bl platform_is_primary_cpu
cbz x0, _panic
@@ -102,7 +101,7 @@ func bl2_entrypoint
* ease the pain of initializing the MMU
* --------------------------------------------
*/
- mov x0, x19
+ mrs x0, mpidr_el1
bl platform_set_coherent_stack
/* ---------------------------------------------
@@ -120,7 +119,7 @@ func bl2_entrypoint
* -IS-WBWA memory
* ---------------------------------------------
*/
- mov x0, x19
+ mrs x0, mpidr_el1
bl platform_set_stack
/* ---------------------------------------------
diff --git a/bl31/aarch64/bl31_entrypoint.S b/bl31/aarch64/bl31_entrypoint.S
index 1b79421..13bd5b8 100644
--- a/bl31/aarch64/bl31_entrypoint.S
+++ b/bl31/aarch64/bl31_entrypoint.S
@@ -107,8 +107,7 @@ func bl31_entrypoint
* So, make sure no secondary has lost its way.
* ---------------------------------------------
*/
- bl read_mpidr
- mov x19, x0
+ mrs x0, mpidr_el1
bl platform_is_primary_cpu
cbz x0, _panic
@@ -137,7 +136,7 @@ func bl31_entrypoint
* ease the pain of initializing the MMU
* --------------------------------------------
*/
- mov x0, x19
+ mrs x0, mpidr_el1
bl platform_set_coherent_stack
/* ---------------------------------------------
@@ -154,7 +153,7 @@ func bl31_entrypoint
* -IS-WBWA memory
* ---------------------------------------------
*/
- mov x0, x19
+ mrs x0, mpidr_el1
bl platform_set_stack
/* ---------------------------------------------
diff --git a/include/common/asm_macros.S b/include/common/asm_macros.S
index 6cf1a19..a41b729 100644
--- a/include/common/asm_macros.S
+++ b/include/common/asm_macros.S
@@ -58,7 +58,7 @@
.macro smc_check label
- bl read_esr
+ mrs x0, esr_el3
ubfx x0, x0, #ESR_EC_SHIFT, #ESR_EC_LENGTH
cmp x0, #EC_AARCH64_SMC
b.ne $label
diff --git a/include/lib/aarch64/arch_helpers.h b/include/lib/aarch64/arch_helpers.h
index 08fb7f7..517e25a 100644
--- a/include/lib/aarch64/arch_helpers.h
+++ b/include/lib/aarch64/arch_helpers.h
@@ -194,9 +194,7 @@ extern unsigned long read_ttbr0_el1(void);
extern unsigned long read_ttbr0_el2(void);
extern unsigned long read_ttbr0_el3(void);
-extern unsigned long read_ttbr1(void);
extern unsigned long read_ttbr1_el1(void);
-extern unsigned long read_ttbr1_el2(void);
extern unsigned long read_cptr_el2(void);
extern unsigned long read_cptr_el3(void);
@@ -228,12 +226,10 @@ extern void write_esr_el1(unsigned long);
extern void write_esr_el2(unsigned long);
extern void write_esr_el3(unsigned long);
-extern void write_afsr0(unsigned long);
extern void write_afsr0_el1(unsigned long);
extern void write_afsr0_el2(unsigned long);
extern void write_afsr0_el3(unsigned long);
-extern void write_afsr1(unsigned long);
extern void write_afsr1_el1(unsigned long);
extern void write_afsr1_el2(unsigned long);
extern void write_afsr1_el3(unsigned long);
@@ -263,7 +259,6 @@ extern void write_ttbr0_el2(unsigned long);
extern void write_ttbr0_el3(unsigned long);
extern void write_ttbr1_el1(unsigned long);
-extern void write_ttbr1_el2(unsigned long);
extern void write_cpuectlr(unsigned long);
extern void write_cptr_el2(unsigned long);
diff --git a/lib/aarch64/cpu_helpers.S b/lib/aarch64/cpu_helpers.S
index 4e5eb5b..abb996d 100644
--- a/lib/aarch64/cpu_helpers.S
+++ b/lib/aarch64/cpu_helpers.S
@@ -35,13 +35,11 @@
func cpu_reset_handler
- mov x19, x30 // lr
-
/* ---------------------------------------------
* As a bare minimal enable the SMP bit.
* ---------------------------------------------
*/
- bl read_midr
+ mrs x0, midr_el1
lsr x0, x0, #MIDR_PN_SHIFT
and x0, x0, #MIDR_PN_MASK
cmp x0, #MIDR_PN_A57
@@ -49,9 +47,9 @@ func cpu_reset_handler
cmp x0, #MIDR_PN_A53
b.ne smp_setup_end
smp_setup_begin:
- bl read_cpuectlr
+ mrs x0, CPUECTLR_EL1
orr x0, x0, #CPUECTLR_SMP_BIT
- bl write_cpuectlr
+ msr CPUECTLR_EL1, x0
isb
smp_setup_end:
- ret x19
+ ret
diff --git a/lib/aarch64/misc_helpers.S b/lib/aarch64/misc_helpers.S
index bccc936..e7ee015 100644
--- a/lib/aarch64/misc_helpers.S
+++ b/lib/aarch64/misc_helpers.S
@@ -46,22 +46,18 @@
.globl read_daif
.globl write_daif
- .globl read_spsr
.globl read_spsr_el1
.globl read_spsr_el2
.globl read_spsr_el3
- .globl write_spsr
.globl write_spsr_el1
.globl write_spsr_el2
.globl write_spsr_el3
- .globl read_elr
.globl read_elr_el1
.globl read_elr_el2
.globl read_elr_el3
- .globl write_elr
.globl write_elr_el1
.globl write_elr_el2
.globl write_elr_el3
@@ -153,16 +149,6 @@ func write_daif
ret
-func read_spsr
- mrs x0, CurrentEl
- cmp x0, #(MODE_EL1 << MODE_EL_SHIFT)
- b.eq read_spsr_el1
- cmp x0, #(MODE_EL2 << MODE_EL_SHIFT)
- b.eq read_spsr_el2
- cmp x0, #(MODE_EL3 << MODE_EL_SHIFT)
- b.eq read_spsr_el3
-
-
func read_spsr_el1
mrs x0, spsr_el1
ret
@@ -178,16 +164,6 @@ func read_spsr_el3
ret
-func write_spsr
- mrs x1, CurrentEl
- cmp x1, #(MODE_EL1 << MODE_EL_SHIFT)
- b.eq write_spsr_el1
- cmp x1, #(MODE_EL2 << MODE_EL_SHIFT)
- b.eq write_spsr_el2
- cmp x1, #(MODE_EL3 << MODE_EL_SHIFT)
- b.eq write_spsr_el3
-
-
func write_spsr_el1
msr spsr_el1, x0
ret
@@ -203,16 +179,6 @@ func write_spsr_el3
ret
-func read_elr
- mrs x0, CurrentEl
- cmp x0, #(MODE_EL1 << MODE_EL_SHIFT)
- b.eq read_elr_el1
- cmp x0, #(MODE_EL2 << MODE_EL_SHIFT)
- b.eq read_elr_el2
- cmp x0, #(MODE_EL3 << MODE_EL_SHIFT)
- b.eq read_elr_el3
-
-
func read_elr_el1
mrs x0, elr_el1
ret
@@ -228,16 +194,6 @@ func read_elr_el3
ret
-func write_elr
- mrs x1, CurrentEl
- cmp x1, #(MODE_EL1 << MODE_EL_SHIFT)
- b.eq write_elr_el1
- cmp x1, #(MODE_EL2 << MODE_EL_SHIFT)
- b.eq write_elr_el2
- cmp x1, #(MODE_EL3 << MODE_EL_SHIFT)
- b.eq write_elr_el3
-
-
func write_elr_el1
msr elr_el1, x0
ret
diff --git a/lib/aarch64/sysreg_helpers.S b/lib/aarch64/sysreg_helpers.S
index 1d73ba9..376da49 100644
--- a/lib/aarch64/sysreg_helpers.S
+++ b/lib/aarch64/sysreg_helpers.S
@@ -125,10 +125,7 @@
.globl write_ttbr0_el3
.globl read_ttbr1_el1
- .globl read_ttbr1_el2
- .globl write_ttbr1
.globl write_ttbr1_el1
- .globl write_ttbr1_el2
.globl read_cpacr
.globl write_cpacr
@@ -160,8 +157,6 @@
#if SUPPORT_VFP
.globl enable_vfp
- .globl read_fpexc
- .globl write_fpexc
#endif
@@ -577,11 +572,6 @@ func write_tcr_el3
* CPTR accessors
* -----------------------------------------------------
*/
-func read_cptr_el1
- b read_cptr_el1
- ret
-
-
func read_cptr_el2
mrs x0, cptr_el2
ret
@@ -592,10 +582,6 @@ func read_cptr_el3
ret
-func write_cptr_el1
- b write_cptr_el1
-
-
func write_cptr_el2
msr cptr_el2, x0
ret
@@ -649,27 +635,11 @@ func read_ttbr1_el1
ret
-func read_ttbr1_el2
- b read_ttbr1_el2
-
-
-func read_ttbr1_el3
- b read_ttbr1_el3
-
-
func write_ttbr1_el1
msr ttbr1_el1, x0
ret
-func write_ttbr1_el2
- b write_ttbr1_el2
-
-
-func write_ttbr1_el3
- b write_ttbr1_el3
-
-
func read_hcr
mrs x0, hcr_el2
ret
@@ -762,14 +732,4 @@ func enable_vfp
isb
ret
-
-func read_fpexc
- b read_fpexc
- ret
-
-
-func write_fpexc
- b write_fpexc
- ret
-
#endif
diff --git a/plat/fvp/aarch64/bl1_plat_helpers.S b/plat/fvp/aarch64/bl1_plat_helpers.S
index 92075ea..b4d4458 100644
--- a/plat/fvp/aarch64/bl1_plat_helpers.S
+++ b/plat/fvp/aarch64/bl1_plat_helpers.S
@@ -67,7 +67,7 @@ func plat_secondary_cold_boot_setup
* loader zeroes out the zi section.
* ---------------------------------------------
*/
- bl read_mpidr
+ mrs x0, mpidr_el1
ldr x1, =PWRC_BASE
str w0, [x1, #PPOFFR_OFF]
@@ -173,8 +173,6 @@ func platform_mem_init
func platform_cold_boot_init
mov x20, x0
bl platform_mem_init
- bl read_mpidr
- mov x19, x0
/* ---------------------------------------------
* Give ourselves a small coherent stack to
@@ -182,6 +180,7 @@ func platform_cold_boot_init
* CCI in assembler
* ---------------------------------------------
*/
+ mrs x0, mpidr_el1
bl platform_set_coherent_stack
/* ---------------------------------------------
@@ -200,7 +199,7 @@ func platform_cold_boot_init
* -IS-WBWA memory
* ---------------------------------------------
*/
- mov x0, x19
+ mrs x0, mpidr_el1
bl platform_set_stack
/* ---------------------------------------------
diff --git a/services/std_svc/psci/psci_entry.S b/services/std_svc/psci/psci_entry.S
index ec55a81..25adaa1 100644
--- a/services/std_svc/psci/psci_entry.S
+++ b/services/std_svc/psci/psci_entry.S
@@ -76,8 +76,7 @@ psci_aff_common_finish_entry:
*/
msr spsel, #0
- bl read_mpidr
- mov x19, x0
+ mrs x0, mpidr_el1
bl platform_set_coherent_stack
/* ---------------------------------------------
@@ -85,14 +84,14 @@ psci_aff_common_finish_entry:
* level 0.
* ---------------------------------------------
*/
- mov x0, x19
+ mrs x0, mpidr_el1
bl get_power_on_target_afflvl
cmp x0, xzr
b.lt _panic
mov x3, x23
mov x2, x0
- mov x0, x19
mov x1, #MPIDR_AFFLVL0
+ mrs x0, mpidr_el1
blr x22
/* --------------------------------------------
@@ -100,7 +99,7 @@ psci_aff_common_finish_entry:
* -IS-WBWA memory
* --------------------------------------------
*/
- mov x0, x19
+ mrs x0, mpidr_el1
bl platform_set_stack
zero_callee_saved_regs
@@ -119,7 +118,7 @@ func __psci_cpu_off
sub sp, sp, #0x10
stp x19, x20, [sp, #0]
mov x19, sp
- bl read_mpidr
+ mrs x0, mpidr_el1
bl platform_set_coherent_stack
bl psci_cpu_off
mov x1, #PSCI_E_SUCCESS
@@ -140,7 +139,7 @@ func __psci_cpu_suspend
mov x20, x0
mov x21, x1
mov x22, x2
- bl read_mpidr
+ mrs x0, mpidr_el1
bl platform_set_coherent_stack
mov x0, x20
mov x1, x21