diff options
| author | Sandrine Bailleux <sandrine.bailleux@arm.com> | 2013-11-15 14:46:44 +0000 |
|---|---|---|
| committer | Dan Handley <dan.handley@arm.com> | 2013-11-27 15:31:06 +0000 |
| commit | 295538bc374bab20ea6ec68137cbee5997b541c6 (patch) | |
| tree | 750c7eba5030d3192d7281fe6ec0e1b22f1fc0ee | |
| parent | 3738274dc1b40ad846d41d7bfd6a597bcfba9e70 (diff) | |
| download | arm-trusted-firmware-295538bc374bab20ea6ec68137cbee5997b541c6.tar.gz | |
AArch64: Remove EL-agnostic TLB helper functions
Also, don't invalidate the TLBs in disable_mmu() function, it's better
to do it in enable_mmu() function just before actually enabling the
MMU.
Change-Id: Ib32d6660019b0b2c17254156aad4be67ab4970e1
| -rw-r--r-- | include/aarch64/arch_helpers.h | 2 | ||||
| -rw-r--r-- | lib/arch/aarch64/tlb_helpers.S | 22 | ||||
| -rw-r--r-- | plat/fvp/aarch64/fvp_common.c | 5 |
3 files changed, 1 insertions, 28 deletions
diff --git a/include/aarch64/arch_helpers.h b/include/aarch64/arch_helpers.h index b571a5d..9dc6b92 100644 --- a/include/aarch64/arch_helpers.h +++ b/include/aarch64/arch_helpers.h @@ -48,8 +48,6 @@ /******************************************************************************* * TLB maintenance accessor prototypes ******************************************************************************/ -extern void tlbiall(void); -extern void tlbiallis(void); extern void tlbialle1(void); extern void tlbialle1is(void); extern void tlbialle2(void); diff --git a/lib/arch/aarch64/tlb_helpers.S b/lib/arch/aarch64/tlb_helpers.S index 8377f2c..eef7546 100644 --- a/lib/arch/aarch64/tlb_helpers.S +++ b/lib/arch/aarch64/tlb_helpers.S @@ -30,8 +30,6 @@ #include <arch_helpers.h> - .globl tlbiall - .globl tlbiallis .globl tlbialle1 .globl tlbialle1is .globl tlbialle2 @@ -43,26 +41,6 @@ .section .text, "ax" -tlbiall:; .type tlbiall, %function - mrs x0, CurrentEl - cmp x0, #(MODE_EL1 << MODE_EL_SHIFT) - b.eq tlbialle1 - cmp x0, #(MODE_EL2 << MODE_EL_SHIFT) - b.eq tlbialle2 - cmp x0, #(MODE_EL3 << MODE_EL_SHIFT) - b.eq tlbialle3 - - -tlbiallis:; .type tlbiallis, %function - mrs x0, CurrentEl - cmp x0, #(MODE_EL1 << MODE_EL_SHIFT) - b.eq tlbialle1is - cmp x0, #(MODE_EL2 << MODE_EL_SHIFT) - b.eq tlbialle2is - cmp x0, #(MODE_EL3 << MODE_EL_SHIFT) - b.eq tlbialle3is - - tlbialle1:; .type tlbialle1, %function tlbi alle1 dsb sy diff --git a/plat/fvp/aarch64/fvp_common.c b/plat/fvp/aarch64/fvp_common.c index 78a44a5..0b5f4eb 100644 --- a/plat/fvp/aarch64/fvp_common.c +++ b/plat/fvp/aarch64/fvp_common.c @@ -461,7 +461,7 @@ void enable_mmu() TCR_RGN_INNER_WBA | TCR_T0SZ_4GB; if (GET_EL(current_el) == MODE_EL3) { tcr |= TCR_EL3_RES1; - /* Invalidate all TLBs */ + /* Invalidate EL3 TLBs */ tlbialle3(); } else { /* Invalidate EL1 TLBs */ @@ -491,9 +491,6 @@ void disable_mmu(void) write_ttbr0(0); write_sctlr(0); - /* Invalidate TLBs of the CurrentEL */ - tlbiall(); - /* Flush the caches */ dcsw_op_all(DCCISW); |