path: root/arch/arm/mach-ux500/cache-l2x0.c
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2013-03-18ARM: mach-ux500: enable 128KB way L2 cache on DB8540ux500-core-v3.10Maxime Coquelin
DB8540 L2 was configured with 64KB way size, but it has 128KB as AP9540. Fix this by modifying ux500_l2x0_init() to use 128KB way size for all cpus in the x540 family. Signed-off-by: Maxime Coquelin <maxime.coquelin@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-29ARM: ux500: de-globalize <mach/id.h>ux500-no-idhLinus Walleij
This removes the file <mach/id.h> from the global kernel include scope, making it a pure mach-ux500 detail. All ASIC specifics needed by drivers shall henceforth be passed from either platform data or the device tree. Cc: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Samuel Ortiz <sameo@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-08-09ARM: ux500: reform Ux500 family namesLinus Walleij
Counting the U9540 and the new U8540 as a U8500 family member does not work. Instead, split the function in two: cpu_is_u8500_family() covering U8500 and U8520 cpu_is_ux540_family() covering U9540 and U8540 This works much better in practice. Update users to keep the same behaviour. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-14Merge branch 'ux500/delete-u5500' into next/socArnd Bergmann
Conflicts: arch/arm/mach-ux500/cache-l2x0.c arch/arm/mach-ux500/clock.c arch/arm/mach-ux500/cpu.c arch/arm/mach-ux500/mbox-db5500.c arch/arm/mach-ux500/platsmp.c arch/arm/mach-ux500/timer.c Resolve lots of identical conflicts between the removal of u5500 and the addition of u8540. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-05-02ARM: ux500: delete U5500 supportLinus Walleij
This platform has been obsoleted and was only available inside of ST-Ericsson, no users of this code are left in the world. This deletes the core U5500 support entirely in the same manner as the obsoleted U8500 silicon was previously deleted. The cpu_is_u5500() macros that can read out the CPU ID is left until the next kernel cycle, this makes it possible to merge deletion of dependent drivers without breakage. This also has the upside of removing the mailbox driver which was our only driver that was outside the drivers/* hiearchy, now the machine directory only handles machines and nothing else. Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Rabin Vincent <rabin.vincent@stericsson.com> Cc: Jonas Aberg <jonas.aberg@stericsson.com> Cc: Per Forlin <per.forlin@stericsson.com> Cc: Ulf Hansson <ulf.hansson@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-02ARM: ux500: core U9540 supportLinus Walleij
This adds support for the U9540 variant of the U8500 series. This is an application processor without internal modem. This is the most basic part with ASIC ID, CPU-related fixes, IRQ list, register ranges, timer, UART, and L2 cache setup. This is based on a patch by Michel Jaouen which was rewritten to fit with the latest 3.3 kernel. ChangeLog v1->v2: deleted the irqs-db9540.h file since we expect to migrate to using Device Tree for getting the IRQs to devices. ChangeLog v2->v3: introduced a fixed virtual offset for the ROM as suggested by Arnd Bergmann. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Sebastien Pasdeloup <sebastien.pasdeloup-nonst@stericsson.com> Signed-off-by: Michel Jaouen <michel.jaouen@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-03-16ARM: ux500: Enable PL310 Level 2 Cache Controller in Device TreeLee Jones
This provides PL310 Level 2 Cache Controller Device Tree support for all u8500 based devices. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-01-20mach-ux500: do not override outer.inv_allsrinidhi kasagar
Invalidating outer cache without disabling it is a big nono, and so, remove the machine specific outer.inv_all And at the same time it does not prevent us overriding outer.disable as we do not have any such secure SMI to handle the same while kexec disables the outer cache. Signed-off-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Reviewed-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-10-08Merge branch 'stericsson/fixes' into next/cleanupArnd Bergmann
Conflicts: arch/arm/mach-ux500/cpu.c
2011-08-30mach-ux500: factor out l2x0 handling codeLinus Walleij
Following mach-imx we break out the l2x0 handling into its own file, avoiding some ifdefs. Also remove unnecessary creation of local pointers when there is already one file-local readily available. Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>