|author||Seunghun Lee <email@example.com>||2014-07-31 22:30:32 +0900|
|committer||Greg Kroah-Hartman <firstname.lastname@example.org>||2014-08-01 14:50:04 -0700|
staging: dgnc: rephrase comment
Rephrase comment to explain original intention of function. CC: Lidza Louina <email@example.com> CC: Mark Hounschell <firstname.lastname@example.org> Suggested-by: Tobias Klauser <email@example.com> Signed-off-by: Seunghun Lee <firstname.lastname@example.org> Signed-off-by: Greg Kroah-Hartman <email@example.com>
Diffstat (limited to 'drivers/staging/dgnc')
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/staging/dgnc/dgnc_cls.c b/drivers/staging/dgnc/dgnc_cls.c
index 4b65306b22ac..5a76a8e2f6cf 100644
@@ -1040,11 +1040,11 @@ static void cls_flush_uart_read(struct channel_t *ch)
* For complete POSIX compatibility, we should be purging the
* read FIFO in the UART here.
- * However, doing the statement below also incorrectly flushes
- * write data as well as just basically trashing the FIFO.
+ * However, clearing the read FIFO (UART_FCR_CLEAR_RCVR) also
+ * incorrectly flushes write data as well as just basically trashing the
+ * FIFO.
- * I believe this is a BUG in this UART.
- * So for now, we will leave the code #ifdef'ed out...
+ * Presumably, this is a bug in this UART.