path: root/drivers/gpu/drm/i915/intel_drv.h
diff options
authorDaniel Vetter <daniel.vetter@ffwll.ch>2014-04-24 23:54:52 +0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-05-16 11:58:26 +0200
commit9ed109a7b445e3f073d8ea72f888ec80c0532465 (patch)
tree97c7aacdad14a14874dda532295cd5e16d266f91 /drivers/gpu/drm/i915/intel_drv.h
parentacfa75b02e72bad7c93564ac379712e29c001432 (diff)
drm/i915: Track has_audio in the pipe config
Including state readout and cross-checking. This allows us to get rid of crtc->eld_vld on hsw+. It also means that fastboot will be unhappy if the BIOS hasn't set up the audio routing like we want it too. Wrt fastboot and external screens I see a few options: - Don't. - Try to fix up eld, infoframes and audio settings after the fact. But that means some pretty extensive reworking of our code which currently does all this while the pipe/port is still off. I won't bother with converting SDVO over to this because the audio support for SDVO is very lacking: - We don't update the eld. - We don't update the audio state on the sdvo encoder. - We don't check whether the platform can even feed audio to the sdvo encoder. I've converted hdmi, dp & ddi all in one go since ddi needs both hdmi and dp converted and so doing it step-by-step would have required a few intermediate hacks. Reviewed-by: Naresh Kumar Kachhi <naresh.kumar.kachhi@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_drv.h')
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 1a5ecc98eb93..0ef2777514fe 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -276,6 +276,10 @@ struct intel_crtc_config {
/* Whether we should send NULL infoframes. Required for audio. */
bool has_hdmi_sink;
+ /* Audio enabled on this pipe. Only valid if either has_hdmi_sink or
+ * has_dp_encoder is set. */
+ bool has_audio;
* Enable dithering, used when the selected pipe bpp doesn't match the
* plane bpp.
@@ -366,7 +370,6 @@ struct intel_crtc {
bool active;
unsigned long enabled_power_domains;
- bool eld_vld;
bool primary_enabled; /* is the primary plane (partially) visible? */
bool lowfreq_avail;
struct intel_overlay *overlay;