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authorArd Biesheuvel <ard.biesheuvel@linaro.org>2018-09-24 14:48:16 +0200
committerHerbert Xu <herbert@gondor.apana.org.au>2018-10-05 10:16:56 +0800
commit944585a64f5e37d11ff274a905304b565a88e147 (patch)
tree9802a55bd00eab52d59bfa7fe6b7b01a83446863 /crypto
parent79517e8f8e6dddd2a90517123ffdb366828b69f5 (diff)
downloadlinux-stericsson-944585a64f5e37d11ff274a905304b565a88e147.tar.gz
crypto: x86/aes-ni - remove special handling of AES in PCBC mode
For historical reasons, the AES-NI based implementation of the PCBC chaining mode uses a special FPU chaining mode wrapper template to amortize the FPU start/stop overhead over multiple blocks. When this FPU wrapper was introduced, it supported widely used chaining modes such as XTS and CTR (as well as LRW), but currently, PCBC is the only remaining user. Since there are no known users of pcbc(aes) in the kernel, let's remove this special driver, and rely on the generic pcbc driver to encapsulate the AES-NI core cipher. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'crypto')
-rw-r--r--crypto/Kconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/crypto/Kconfig b/crypto/Kconfig
index 63ef279322d2..f7a235db56aa 100644
--- a/crypto/Kconfig
+++ b/crypto/Kconfig
@@ -1083,7 +1083,7 @@ config CRYPTO_AES_NI_INTEL
In addition to AES cipher algorithm support, the acceleration
for some popular block cipher mode is supported too, including
- ECB, CBC, LRW, PCBC, XTS. The 64 bit version has additional
+ ECB, CBC, LRW, XTS. The 64 bit version has additional
acceleration for CTR.
config CRYPTO_AES_SPARC64